diff mbox series

[RFC,v1,13/19] rtw88: mac: Add support for SDIO specifics in the power on sequence

Message ID 20221227233020.284266-14-martin.blumenstingl@googlemail.com (mailing list archive)
State RFC
Delegated to: Kalle Valo
Headers show
Series rtw88: Add SDIO support | expand

Commit Message

Martin Blumenstingl Dec. 27, 2022, 11:30 p.m. UTC 
Add the code specific to SDIO HCI in the MAC power on sequence. This is
based on the RTL8822BS and RTL8822CS vendor drivers.

Co-developed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 drivers/net/wireless/realtek/rtw88/mac.c | 41 ++++++++++++++++++++++--
 1 file changed, 39 insertions(+), 2 deletions(-)

Comments

Ping-Ke Shih Dec. 29, 2022, 1:14 a.m. UTC | #1 
> -----Original Message-----
> From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> Sent: Wednesday, December 28, 2022 7:30 AM
> To: linux-wireless@vger.kernel.org
> Cc: Yan-Hsuan Chuang <tony0620emma@gmail.com>; Kalle Valo <kvalo@kernel.org>; Ulf Hansson
> <ulf.hansson@linaro.org>; linux-kernel@vger.kernel.org; netdev@vger.kernel.org;
> linux-mmc@vger.kernel.org; Chris Morgan <macroalpha82@gmail.com>; Nitin Gupta <nitin.gupta981@gmail.com>;
> Neo Jou <neojou@gmail.com>; Ping-Ke Shih <pkshih@realtek.com>; Jernej Skrabec <jernej.skrabec@gmail.com>;
> Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> Subject: [RFC PATCH v1 13/19] rtw88: mac: Add support for SDIO specifics in the power on sequence
> 
> Add the code specific to SDIO HCI in the MAC power on sequence. This is
> based on the RTL8822BS and RTL8822CS vendor drivers.
> 
> Co-developed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
> Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> ---
>  drivers/net/wireless/realtek/rtw88/mac.c | 41 ++++++++++++++++++++++--
>  1 file changed, 39 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/net/wireless/realtek/rtw88/mac.c b/drivers/net/wireless/realtek/rtw88/mac.c
> index 8e1fa824b32b..ad71f9838d1d 100644
> --- a/drivers/net/wireless/realtek/rtw88/mac.c
> +++ b/drivers/net/wireless/realtek/rtw88/mac.c
> @@ -7,6 +7,7 @@
>  #include "reg.h"
>  #include "fw.h"
>  #include "debug.h"
> +#include "sdio.h"
> 
>  void rtw_set_channel_mac(struct rtw_dev *rtwdev, u8 channel, u8 bw,
>  			 u8 primary_ch_idx)
> @@ -60,6 +61,7 @@ EXPORT_SYMBOL(rtw_set_channel_mac);
> 
>  static int rtw_mac_pre_system_cfg(struct rtw_dev *rtwdev)
>  {
> +	unsigned int retry;
>  	u32 value32;
>  	u8 value8;
> 
> @@ -77,6 +79,26 @@ static int rtw_mac_pre_system_cfg(struct rtw_dev *rtwdev)
>  	case RTW_HCI_TYPE_PCIE:
>  		rtw_write32_set(rtwdev, REG_HCI_OPT_CTRL, BIT_USB_SUS_DIS);
>  		break;
> +	case RTW_HCI_TYPE_SDIO:
> +		rtw_write8_clr(rtwdev, REG_SDIO_HSUS_CTRL, BIT(0));

BIT_HCI_SUS_REQ BIT(0)

> +
> +		for (retry = 0; retry < RTW_PWR_POLLING_CNT; retry++) {
> +			if (rtw_read8(rtwdev, REG_SDIO_HSUS_CTRL) & BIT(1))

BIT_HCI_RESUME_RDY BIT(1)

> +				break;
> +
> +			usleep_range(10, 50);
> +		}
> +
> +		if (retry == RTW_PWR_POLLING_CNT) {
> +			rtw_err(rtwdev, "failed to poll REG_SDIO_HSUS_CTRL[1]");
> +			return -ETIMEDOUT;
> +		}
> +
> +		if (rtw_sdio_is_sdio30_supported(rtwdev))
> +			rtw_write8_set(rtwdev, REG_HCI_OPT_CTRL + 2, BIT(2));

BIT_USB_LPM_ACT_EN BIT(10)   // reg_addr +2, so bit >> 8

> +		else
> +			rtw_write8_clr(rtwdev, REG_HCI_OPT_CTRL + 2, BIT(2));
> +		break;
>  	case RTW_HCI_TYPE_USB:
>  		break;
>  	default:

[...]
Martin Blumenstingl Dec. 29, 2022, 10:49 a.m. UTC | #2 
Hi Ping-Ke,

On Thu, Dec 29, 2022 at 2:15 AM Ping-Ke Shih <pkshih@realtek.com> wrote:
[...]
> > +             if (rtw_sdio_is_sdio30_supported(rtwdev))
> > +                     rtw_write8_set(rtwdev, REG_HCI_OPT_CTRL + 2, BIT(2));
>
> BIT_USB_LPM_ACT_EN BIT(10)   // reg_addr +2, so bit >> 8
The ones above are clear to me, thank you.
But for this one I have a question: don't we need BIT(18) for this one
and then bit >> 16?
reg_addr + 0: bits 0..7
reg_addr + 1: bits 8..15
reg_addr + 2: bits 16..23


Best regards,
Martin
Ping-Ke Shih Dec. 29, 2022, 11:24 a.m. UTC | #3 
On Thu, 2022-12-29 at 11:49 +0100, Martin Blumenstingl wrote:
> Hi Ping-Ke,
> 
> On Thu, Dec 29, 2022 at 2:15 AM Ping-Ke Shih <pkshih@realtek.com> wrote:
> [...]
> > > +             if (rtw_sdio_is_sdio30_supported(rtwdev))
> > > +                     rtw_write8_set(rtwdev, REG_HCI_OPT_CTRL + 2, BIT(2));
> > 
> > BIT_USB_LPM_ACT_EN BIT(10)   // reg_addr +2, so bit >> 8
> The ones above are clear to me, thank you.
> But for this one I have a question: don't we need BIT(18) for this one
> and then bit >> 16?
> reg_addr + 0: bits 0..7
> reg_addr + 1: bits 8..15
> reg_addr + 2: bits 16..23
> 
> 

Sorry, my mistakes.

It should be  "BIT_SDIO_PAD_E5 BIT(18)" and >> 16.

--
Ping-Ke
diff mbox series

Patch

diff --git a/drivers/net/wireless/realtek/rtw88/mac.c b/drivers/net/wireless/realtek/rtw88/mac.c
index 8e1fa824b32b..ad71f9838d1d 100644
--- a/drivers/net/wireless/realtek/rtw88/mac.c
+++ b/drivers/net/wireless/realtek/rtw88/mac.c
@@ -7,6 +7,7 @@ 
 #include "reg.h"
 #include "fw.h"
 #include "debug.h"
+#include "sdio.h"
 
 void rtw_set_channel_mac(struct rtw_dev *rtwdev, u8 channel, u8 bw,
 			 u8 primary_ch_idx)
@@ -60,6 +61,7 @@  EXPORT_SYMBOL(rtw_set_channel_mac);
 
 static int rtw_mac_pre_system_cfg(struct rtw_dev *rtwdev)
 {
+	unsigned int retry;
 	u32 value32;
 	u8 value8;
 
@@ -77,6 +79,26 @@  static int rtw_mac_pre_system_cfg(struct rtw_dev *rtwdev)
 	case RTW_HCI_TYPE_PCIE:
 		rtw_write32_set(rtwdev, REG_HCI_OPT_CTRL, BIT_USB_SUS_DIS);
 		break;
+	case RTW_HCI_TYPE_SDIO:
+		rtw_write8_clr(rtwdev, REG_SDIO_HSUS_CTRL, BIT(0));
+
+		for (retry = 0; retry < RTW_PWR_POLLING_CNT; retry++) {
+			if (rtw_read8(rtwdev, REG_SDIO_HSUS_CTRL) & BIT(1))
+				break;
+
+			usleep_range(10, 50);
+		}
+
+		if (retry == RTW_PWR_POLLING_CNT) {
+			rtw_err(rtwdev, "failed to poll REG_SDIO_HSUS_CTRL[1]");
+			return -ETIMEDOUT;
+		}
+
+		if (rtw_sdio_is_sdio30_supported(rtwdev))
+			rtw_write8_set(rtwdev, REG_HCI_OPT_CTRL + 2, BIT(2));
+		else
+			rtw_write8_clr(rtwdev, REG_HCI_OPT_CTRL + 2, BIT(2));
+		break;
 	case RTW_HCI_TYPE_USB:
 		break;
 	default:
@@ -248,6 +270,7 @@  static int rtw_mac_power_switch(struct rtw_dev *rtwdev, bool pwr_on)
 {
 	const struct rtw_chip_info *chip = rtwdev->chip;
 	const struct rtw_pwr_seq_cmd **pwr_seq;
+	u32 imr;
 	u8 rpwm;
 	bool cur_pwr;
 
@@ -278,12 +301,19 @@  static int rtw_mac_power_switch(struct rtw_dev *rtwdev, bool pwr_on)
 	 */
 	rtw_hci_power_switch(rtwdev, false);
 
+	imr = rtw_read32(rtwdev, REG_SDIO_HIMR);
+	rtw_write32(rtwdev, REG_SDIO_HIMR, 0);
+
 	pwr_seq = pwr_on ? chip->pwr_on_seq : chip->pwr_off_seq;
-	if (rtw_pwr_seq_parser(rtwdev, pwr_seq))
+	if (rtw_pwr_seq_parser(rtwdev, pwr_seq)) {
+		rtw_write32(rtwdev, REG_SDIO_HIMR, imr);
 		return -EINVAL;
+	}
 
 	rtw_hci_power_switch(rtwdev, pwr_on);
 
+	rtw_write32(rtwdev, REG_SDIO_HIMR, imr);
+
 	return 0;
 }
 
@@ -450,6 +480,9 @@  static void download_firmware_reg_backup(struct rtw_dev *rtwdev,
 	rtw_write16(rtwdev, REG_FIFOPAGE_INFO_1, 0x200);
 	rtw_write32(rtwdev, REG_RQPN_CTRL_2, bckp[bckp_idx - 1].val);
 
+	if (rtw_hci_type(rtwdev) == RTW_HCI_TYPE_SDIO)
+		rtw_read32(rtwdev, REG_SDIO_FREE_TXPG);
+
 	/* Disable beacon related functions */
 	tmp = rtw_read8(rtwdev, REG_BCN_CTRL);
 	bckp[bckp_idx].len = 1;
@@ -1062,8 +1095,12 @@  static int txdma_queue_mapping(struct rtw_dev *rtwdev)
 	if (rtw_chip_wcpu_11ac(rtwdev))
 		rtw_write32(rtwdev, REG_H2CQ_CSR, BIT_H2CQ_FULL);
 
-	if (rtw_hci_type(rtwdev) == RTW_HCI_TYPE_USB)
+	if (rtw_hci_type(rtwdev) == RTW_HCI_TYPE_SDIO) {
+		rtw_read32(rtwdev, REG_SDIO_FREE_TXPG);
+		rtw_write32(rtwdev, REG_SDIO_TX_CTRL, 0);
+	} else if (rtw_hci_type(rtwdev) == RTW_HCI_TYPE_USB) {
 		rtw_write8_set(rtwdev, REG_TXDMA_PQ_MAP, BIT_RXDMA_ARBBW_EN);
+	}
 
 	return 0;
 }