@@ -2700,9 +2700,10 @@ struct rtw89_ra_info {
* Bit2 : HT
* Bit3 : VHT
* Bit4 : HE
+ * Bit5 : EHT
*/
- u8 mode_ctrl:5;
- u8 bw_cap:2;
+ u8 mode_ctrl:6;
+ u8 bw_cap:3; /* enum rtw89_bandwidth */
u8 macid;
u8 dcm_cap:1;
u8 er_cap:1;
@@ -1905,11 +1905,19 @@ int rtw89_fw_h2c_tp_offload(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif)
int rtw89_fw_h2c_ra(struct rtw89_dev *rtwdev, struct rtw89_ra_info *ra, bool csi)
{
- struct sk_buff *skb;
+ const struct rtw89_chip_info *chip = rtwdev->chip;
+ struct rtw89_h2c_ra_v1 *h2c_v1;
struct rtw89_h2c_ra *h2c;
u32 len = sizeof(*h2c);
+ bool format_v1 = false;
+ struct sk_buff *skb;
int ret;
+ if (chip->chip_gen == RTW89_CHIP_BE) {
+ len = sizeof(*h2c_v1);
+ format_v1 = true;
+ }
+
skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
if (!skb) {
rtw89_err(rtwdev, "failed to alloc skb for h2c join\n");
@@ -1939,6 +1947,14 @@ int rtw89_fw_h2c_ra(struct rtw89_dev *rtwdev, struct rtw89_ra_info *ra, bool csi
h2c->w3 = le32_encode_bits(ra->fix_giltf_en, RTW89_H2C_RA_W3_FIX_GILTF_EN) |
le32_encode_bits(ra->fix_giltf, RTW89_H2C_RA_W3_FIX_GILTF);
+ if (!format_v1)
+ goto csi;
+
+ h2c_v1 = (struct rtw89_h2c_ra_v1 *)h2c;
+ h2c_v1->w4 = le32_encode_bits(ra->mode_ctrl, RTW89_H2C_RA_V1_W4_MODE_EHT) |
+ le32_encode_bits(ra->bw_cap, RTW89_H2C_RA_V1_W4_BW_EHT);
+
+csi:
if (!csi)
goto done;
@@ -327,6 +327,17 @@ struct rtw89_h2c_ra {
#define RTW89_H2C_RA_W3_FIXED_CSI_GI_LTF GENMASK(28, 26)
#define RTW89_H2C_RA_W3_FIXED_CSI_BW GENMASK(31, 29)
+struct rtw89_h2c_ra_v1 {
+ struct rtw89_h2c_ra v0;
+ __le32 w4;
+ __le32 w5;
+} __packed;
+
+#define RTW89_H2C_RA_V1_W4_MODE_EHT GENMASK(6, 0)
+#define RTW89_H2C_RA_V1_W4_BW_EHT GENMASK(10, 8)
+#define RTW89_H2C_RA_V1_W4_RAMASK_UHL16 GENMASK(31, 16)
+#define RTW89_H2C_RA_V1_W5_RAMASK_UHH16 GENMASK(15, 0)
+
static inline void RTW89_SET_FWCMD_SEC_IDX(void *cmd, u32 val)
{
le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(7, 0));
H2C RA V1 command adds two words to support WiFi 7 chips, which can possibly support up to 4SS rates. Because current chips have only 2SS rates, leave the fields blank for now. The main changes are to set extended bits of EHT mode and bandwidth -- add a bit for EHT mode; add a bit to enumerate 320MHz channel bandwidth. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> --- drivers/net/wireless/realtek/rtw89/core.h | 5 +++-- drivers/net/wireless/realtek/rtw89/fw.c | 18 +++++++++++++++++- drivers/net/wireless/realtek/rtw89/fw.h | 11 +++++++++++ 3 files changed, 31 insertions(+), 3 deletions(-)