| Message ID | 20250210063026.3128-1-zenmchen@gmail.com (mailing list archive) |
|---|---|
| State | Handled Elsewhere |
| Delegated to: | Ping-Ke Shih |
| Headers | show |
| Series | [v6.12] wifi: rtw89: pci: disable PCIE wake bit when PCIE deinit | expand |
On Mon, Feb 10, 2025 at 02:30:26PM +0800, Zenm Chen wrote: > From: Ping-Ke Shih <pkshih@realtek.com> > > [ Upstream commit 9c1df813e08832c3836c254bc8a2f83ff22dbc06 ] > > The PCIE wake bit is to control PCIE wake signal to host. When PCIE is > going down, clear this bit to prevent waking up host unexpectedly. > > Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> > Link: https://patch.msgid.link/20241111063835.15454-1-pkshih@realtek.com > Signed-off-by: Zenm Chen <zenmchen@gmail.com> > --- > Some users of RTL8852BE chip may encounter a shutdown issue [1] and this > upstream patch fixes it, so backport it to kernel 6.12. It also needs to go to 6.13.y too, right? Please provide backports for both as we can not take them only for older kernels as you would have a regression when upgrading. thanks, greg k-h
> It also needs to go to 6.13.y too, right? Please provide backports for > both as we can not take them only for older kernels as you would have a > regression when upgrading. Hi Greg, Thanks for reminding! The patch for kernel 6.13 is here: https://lore.kernel.org/stable/20250211130432.1091-1-zenmchen@gmail.com/T/#u Tested with RTL8852BE on Arch Linux (kernel version: 6.13.2-arch1-1) and it did fix the issue. thanks! > > thanks, > > greg k-h
On Wed, Feb 12, 2025 at 12:34:09AM +0800, Zenm Chen wrote: > > It also needs to go to 6.13.y too, right? Please provide backports for > > both as we can not take them only for older kernels as you would have a > > regression when upgrading. > > Hi Greg, > > Thanks for reminding! The patch for kernel 6.13 is here: > https://lore.kernel.org/stable/20250211130432.1091-1-zenmchen@gmail.com/T/#u > > Tested with RTL8852BE on Arch Linux (kernel version: 6.13.2-arch1-1) > and it did fix the issue. Ok, thanks, but can you now resend the 6.12.y version? greg k-h
> > > It also needs to go to 6.13.y too, right? Please provide backports for > > > both as we can not take them only for older kernels as you would have a > > > regression when upgrading. > > > > Hi Greg, > > > > Thanks for reminding! The patch for kernel 6.13 is here: > > https://lore.kernel.org/stable/20250211130432.1091-1-zenmchen@gmail.com/T/#u > > > > Tested with RTL8852BE on Arch Linux (kernel version: 6.13.2-arch1-1) > > and it did fix the issue. > > Ok, thanks, but can you now resend the 6.12.y version? I resent the patch for kernel 6.12.y, please tell me if I did it incorrectly, thanks. https://lore.kernel.org/stable/20250213142946.3111-1-zenmchen@gmail.com/T/#u
diff --git a/drivers/net/wireless/realtek/rtw89/pci.c b/drivers/net/wireless/realtek/rtw89/pci.c index 5aef7fa37..0ac84f968 100644 --- a/drivers/net/wireless/realtek/rtw89/pci.c +++ b/drivers/net/wireless/realtek/rtw89/pci.c @@ -2492,7 +2492,7 @@ static int rtw89_pci_dphy_delay(struct rtw89_dev *rtwdev) PCIE_DPHY_DLY_25US, PCIE_PHY_GEN1); } -static void rtw89_pci_power_wake(struct rtw89_dev *rtwdev, bool pwr_up) +static void rtw89_pci_power_wake_ax(struct rtw89_dev *rtwdev, bool pwr_up) { if (pwr_up) rtw89_write32_set(rtwdev, R_AX_HCI_OPT_CTRL, BIT_WAKE_CTRL); @@ -2799,6 +2799,8 @@ static int rtw89_pci_ops_deinit(struct rtw89_dev *rtwdev) { const struct rtw89_pci_info *info = rtwdev->pci_info; + rtw89_pci_power_wake(rtwdev, false); + if (rtwdev->chip->chip_id == RTL8852A) { /* ltr sw trigger */ rtw89_write32_set(rtwdev, R_AX_LTR_CTRL_0, B_AX_APP_LTR_IDLE); @@ -2841,7 +2843,7 @@ static int rtw89_pci_ops_mac_pre_init_ax(struct rtw89_dev *rtwdev) return ret; } - rtw89_pci_power_wake(rtwdev, true); + rtw89_pci_power_wake_ax(rtwdev, true); rtw89_pci_autoload_hang(rtwdev); rtw89_pci_l12_vmain(rtwdev); rtw89_pci_gen2_force_ib(rtwdev); @@ -2886,6 +2888,13 @@ static int rtw89_pci_ops_mac_pre_init_ax(struct rtw89_dev *rtwdev) return 0; } +static int rtw89_pci_ops_mac_pre_deinit_ax(struct rtw89_dev *rtwdev) +{ + rtw89_pci_power_wake_ax(rtwdev, false); + + return 0; +} + int rtw89_pci_ltr_set(struct rtw89_dev *rtwdev, bool en) { u32 val; @@ -4264,7 +4273,7 @@ const struct rtw89_pci_gen_def rtw89_pci_gen_ax = { B_AX_RDU_INT}, .mac_pre_init = rtw89_pci_ops_mac_pre_init_ax, - .mac_pre_deinit = NULL, + .mac_pre_deinit = rtw89_pci_ops_mac_pre_deinit_ax, .mac_post_init = rtw89_pci_ops_mac_post_init_ax, .clr_idx_all = rtw89_pci_clr_idx_all_ax, @@ -4280,6 +4289,8 @@ const struct rtw89_pci_gen_def rtw89_pci_gen_ax = { .aspm_set = rtw89_pci_aspm_set_ax, .clkreq_set = rtw89_pci_clkreq_set_ax, .l1ss_set = rtw89_pci_l1ss_set_ax, + + .power_wake = rtw89_pci_power_wake_ax, }; EXPORT_SYMBOL(rtw89_pci_gen_ax); diff --git a/drivers/net/wireless/realtek/rtw89/pci.h b/drivers/net/wireless/realtek/rtw89/pci.h index 48c3ab735..0ea4dcb84 100644 --- a/drivers/net/wireless/realtek/rtw89/pci.h +++ b/drivers/net/wireless/realtek/rtw89/pci.h @@ -1276,6 +1276,8 @@ struct rtw89_pci_gen_def { void (*aspm_set)(struct rtw89_dev *rtwdev, bool enable); void (*clkreq_set)(struct rtw89_dev *rtwdev, bool enable); void (*l1ss_set)(struct rtw89_dev *rtwdev, bool enable); + + void (*power_wake)(struct rtw89_dev *rtwdev, bool pwr_up); }; struct rtw89_pci_info { @@ -1766,4 +1768,13 @@ static inline int rtw89_pci_poll_txdma_ch_idle(struct rtw89_dev *rtwdev) return gen_def->poll_txdma_ch_idle(rtwdev); } + +static inline void rtw89_pci_power_wake(struct rtw89_dev *rtwdev, bool pwr_up) +{ + const struct rtw89_pci_info *info = rtwdev->pci_info; + const struct rtw89_pci_gen_def *gen_def = info->gen_def; + + gen_def->power_wake(rtwdev, pwr_up); +} + #endif diff --git a/drivers/net/wireless/realtek/rtw89/pci_be.c b/drivers/net/wireless/realtek/rtw89/pci_be.c index 7cc328222..2f0d9ff25 100644 --- a/drivers/net/wireless/realtek/rtw89/pci_be.c +++ b/drivers/net/wireless/realtek/rtw89/pci_be.c @@ -614,5 +614,7 @@ const struct rtw89_pci_gen_def rtw89_pci_gen_be = { .aspm_set = rtw89_pci_aspm_set_be, .clkreq_set = rtw89_pci_clkreq_set_be, .l1ss_set = rtw89_pci_l1ss_set_be, + + .power_wake = _patch_pcie_power_wake_be, }; EXPORT_SYMBOL(rtw89_pci_gen_be);