| Message ID | 20220801184656.702930-3-matej.vasilevski@seznam.cz (mailing list archive) |
|---|---|
| State | Awaiting Upstream |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | can: ctucanfd: hardware rx timestamps reporting | expand |
| Context | Check | Description |
|---|---|---|
| netdev/tree_selection | success | Series ignored based on subject, async |
Dear Matej Vasilevski, thanks much for the work On Monday 01 of August 2022 20:46:55 Matej Vasilevski wrote: > Add second clock phandle to specify the timestamping clock. > You can even use the same clock as the core, or define a fixed-clock > if you need something custom. > > Signed-off-by: Matej Vasilevski <matej.vasilevski@seznam.cz> Acked-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
On 01/08/2022 20:46, Matej Vasilevski wrote: > Add second clock phandle to specify the timestamping clock. > You can even use the same clock as the core, or define a fixed-clock > if you need something custom. > > Signed-off-by: Matej Vasilevski <matej.vasilevski@seznam.cz> > --- > .../bindings/net/can/ctu,ctucanfd.yaml | 23 +++++++++++++++---- > 1 file changed, 19 insertions(+), 4 deletions(-) > > diff --git a/Documentation/devicetree/bindings/net/can/ctu,ctucanfd.yaml b/Documentation/devicetree/bindings/net/can/ctu,ctucanfd.yaml > index 4635cb96fc64..90390530f909 100644 > --- a/Documentation/devicetree/bindings/net/can/ctu,ctucanfd.yaml > +++ b/Documentation/devicetree/bindings/net/can/ctu,ctucanfd.yaml > @@ -44,9 +44,23 @@ properties: > > clocks: > description: | > - phandle of reference clock (100 MHz is appropriate > - for FPGA implementation on Zynq-7000 system). > - maxItems: 1 > + Phandle of reference clock (100 MHz is appropriate for FPGA > + implementation on Zynq-7000 system). If you wish to use timestamps > + from the controller, add a second phandle with the clock used for > + timestamping. The timestamping clock is optional, if you don't > + add it here, the driver will use the primary clock frequency for > + timestamp calculations. If you need something custom, define > + a fixed-clock oscillator and reference it. This should not be a guide how to write DTS, but description of hardware. The references to driver are also not really appropriate in the bindings (are you 100% sure that all other operating systems and SW have driver which behaves like this...) > + minItems: 1 > + items: > + - description: core clock > + - description: timestamping clock > + > + clock-names: > + minItems: 1 > + items: > + - const: core-clk > + - const: ts-clk > > required: > - compatible > @@ -61,6 +75,7 @@ examples: > ctu_can_fd_0: can@43c30000 { > compatible = "ctu,ctucanfd"; > interrupts = <0 30 4>; > - clocks = <&clkc 15>; > + clocks = <&clkc 15>, <&clkc 16>; > + clock-names = "core-clk", "ts-clk"; > reg = <0x43c30000 0x10000>; > }; Best regards, Krzysztof
On Tue, Aug 02, 2022 at 09:49:03AM +0200, Krzysztof Kozlowski wrote: > On 01/08/2022 20:46, Matej Vasilevski wrote: > > Add second clock phandle to specify the timestamping clock. > > You can even use the same clock as the core, or define a fixed-clock > > if you need something custom. > > > > Signed-off-by: Matej Vasilevski <matej.vasilevski@seznam.cz> > > --- > > .../bindings/net/can/ctu,ctucanfd.yaml | 23 +++++++++++++++---- > > 1 file changed, 19 insertions(+), 4 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/net/can/ctu,ctucanfd.yaml b/Documentation/devicetree/bindings/net/can/ctu,ctucanfd.yaml > > index 4635cb96fc64..90390530f909 100644 > > --- a/Documentation/devicetree/bindings/net/can/ctu,ctucanfd.yaml > > +++ b/Documentation/devicetree/bindings/net/can/ctu,ctucanfd.yaml > > @@ -44,9 +44,23 @@ properties: > > > > clocks: > > description: | > > - phandle of reference clock (100 MHz is appropriate > > - for FPGA implementation on Zynq-7000 system). > > - maxItems: 1 > > + Phandle of reference clock (100 MHz is appropriate for FPGA > > + implementation on Zynq-7000 system). If you wish to use timestamps > > + from the controller, add a second phandle with the clock used for > > + timestamping. The timestamping clock is optional, if you don't > > + add it here, the driver will use the primary clock frequency for > > + timestamp calculations. If you need something custom, define > > + a fixed-clock oscillator and reference it. > > This should not be a guide how to write DTS, but description of > hardware. The references to driver are also not really appropriate in > the bindings (are you 100% sure that all other operating systems and SW > have driver which behaves like this...) > Hello Krzysztof, thanks for your comment. I'll rewrite it so that it only describes the hardware. Best regards, Matej > > + minItems: 1 > > + items: > > + - description: core clock > > + - description: timestamping clock > > + > > + clock-names: > > + minItems: 1 > > + items: > > + - const: core-clk > > + - const: ts-clk > > > > required: > > - compatible > > @@ -61,6 +75,7 @@ examples: > > ctu_can_fd_0: can@43c30000 { > > compatible = "ctu,ctucanfd"; > > interrupts = <0 30 4>; > > - clocks = <&clkc 15>; > > + clocks = <&clkc 15>, <&clkc 16>; > > + clock-names = "core-clk", "ts-clk"; > > reg = <0x43c30000 0x10000>; > > }; > > > Best regards, > Krzysztof
diff --git a/Documentation/devicetree/bindings/net/can/ctu,ctucanfd.yaml b/Documentation/devicetree/bindings/net/can/ctu,ctucanfd.yaml index 4635cb96fc64..90390530f909 100644 --- a/Documentation/devicetree/bindings/net/can/ctu,ctucanfd.yaml +++ b/Documentation/devicetree/bindings/net/can/ctu,ctucanfd.yaml @@ -44,9 +44,23 @@ properties: clocks: description: | - phandle of reference clock (100 MHz is appropriate - for FPGA implementation on Zynq-7000 system). - maxItems: 1 + Phandle of reference clock (100 MHz is appropriate for FPGA + implementation on Zynq-7000 system). If you wish to use timestamps + from the controller, add a second phandle with the clock used for + timestamping. The timestamping clock is optional, if you don't + add it here, the driver will use the primary clock frequency for + timestamp calculations. If you need something custom, define + a fixed-clock oscillator and reference it. + minItems: 1 + items: + - description: core clock + - description: timestamping clock + + clock-names: + minItems: 1 + items: + - const: core-clk + - const: ts-clk required: - compatible @@ -61,6 +75,7 @@ examples: ctu_can_fd_0: can@43c30000 { compatible = "ctu,ctucanfd"; interrupts = <0 30 4>; - clocks = <&clkc 15>; + clocks = <&clkc 15>, <&clkc 16>; + clock-names = "core-clk", "ts-clk"; reg = <0x43c30000 0x10000>; };
Add second clock phandle to specify the timestamping clock. You can even use the same clock as the core, or define a fixed-clock if you need something custom. Signed-off-by: Matej Vasilevski <matej.vasilevski@seznam.cz> --- .../bindings/net/can/ctu,ctucanfd.yaml | 23 +++++++++++++++---- 1 file changed, 19 insertions(+), 4 deletions(-)