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[v4,0/3] Add Aspeed GPIO controller model

Message ID 20190816073229.22787-1-rashmica.g@gmail.com (mailing list archive)
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Series Add Aspeed GPIO controller model | expand

Message

Rashmica Gupta Aug. 16, 2019, 7:32 a.m. UTC
v5:
- integrated AspeedGPIOController fields into AspeedGPIOClass
- separated ast2600_3_6v and ast2600_1_8v into two classes

v4:
- proper interupt handling thanks to Andrew
- switch statements for reading and writing suggested by Peter
- some small cleanups suggested by Alexey

v3:
- didn't have each gpio set up as an irq 
- now can't access set AC on ast2400 (only exists on ast2500)
- added ast2600 implementation (patch 3)
- renamed a couple of variables for clarity

v2: Addressed Andrew's feedback, added debounce regs, renamed get/set to
read/write to minimise confusion with a 'set' of registers.

Rashmica Gupta (3):
  hw/gpio: Add basic Aspeed GPIO model for AST2400 and AST2500
  aspeed: add a GPIO controller to the SoC
  hw/gpio: Add in AST2600 specific implementation

 include/hw/arm/aspeed_soc.h   |    3 +
 include/hw/gpio/aspeed_gpio.h |  100 ++++
 hw/arm/aspeed_soc.c           |   17 +
 hw/gpio/aspeed_gpio.c         | 1006 +++++++++++++++++++++++++++++++++
 hw/gpio/Makefile.objs         |    1 +
 5 files changed, 1127 insertions(+)
 create mode 100644 include/hw/gpio/aspeed_gpio.h
 create mode 100644 hw/gpio/aspeed_gpio.c

Comments

Cédric Le Goater Aug. 16, 2019, 4:21 p.m. UTC | #1
On 16/08/2019 09:32, Rashmica Gupta wrote:
> v5:
> - integrated AspeedGPIOController fields into AspeedGPIOClass
> - separated ast2600_3_6v and ast2600_1_8v into two classes

Rashmica,

This looks much nicer !  

Please take a look at branch aspeed-4.2 in which I have merged your
v5 and modified slightly the ast2600 part. 

  https://github.com/legoater/qemu/commit/02b3df3f1a380eec4df7c49e88fa7ba27f75a610

I introduced a gpio_1_8v controller with its specific MMIO and IRQ
definitions. Tell me what you think of it. The principal motivation
behind these adjustments is that I don't know yet how we are going 
to instantiate/realize the specific models of the AST2600 SoC. the 
GPIO 1.8v is one of these extra controllers. 

Thanks,

C.

> v4:
> - proper interupt handling thanks to Andrew
> - switch statements for reading and writing suggested by Peter
> - some small cleanups suggested by Alexey
> 
> v3:
> - didn't have each gpio set up as an irq 
> - now can't access set AC on ast2400 (only exists on ast2500)
> - added ast2600 implementation (patch 3)
> - renamed a couple of variables for clarity
> 
> v2: Addressed Andrew's feedback, added debounce regs, renamed get/set to
> read/write to minimise confusion with a 'set' of registers.
> 
> Rashmica Gupta (3):
>   hw/gpio: Add basic Aspeed GPIO model for AST2400 and AST2500
>   aspeed: add a GPIO controller to the SoC
>   hw/gpio: Add in AST2600 specific implementation
> 
>  include/hw/arm/aspeed_soc.h   |    3 +
>  include/hw/gpio/aspeed_gpio.h |  100 ++++
>  hw/arm/aspeed_soc.c           |   17 +
>  hw/gpio/aspeed_gpio.c         | 1006 +++++++++++++++++++++++++++++++++
>  hw/gpio/Makefile.objs         |    1 +
>  5 files changed, 1127 insertions(+)
>  create mode 100644 include/hw/gpio/aspeed_gpio.h
>  create mode 100644 hw/gpio/aspeed_gpio.c
>
Rashmica Gupta Aug. 27, 2019, 1:33 a.m. UTC | #2
On Fri, 2019-08-16 at 18:21 +0200, Cédric Le Goater wrote:
> On 16/08/2019 09:32, Rashmica Gupta wrote:
> > v5:
> > - integrated AspeedGPIOController fields into AspeedGPIOClass
> > - separated ast2600_3_6v and ast2600_1_8v into two classes
> 
> Rashmica,
> 
> This looks much nicer !  
> 
> Please take a look at branch aspeed-4.2 in which I have merged your
> v5 and modified slightly the ast2600 part. 
> 
>   
> 
https://github.com/legoater/qemu/commit/02b3df3f1a380eec4df7c49e88fa7ba27f75a610
> 
> I introduced a gpio_1_8v controller with its specific MMIO and IRQ
> definitions. Tell me what you think of it. The principal motivation
> behind these adjustments is that I don't know yet how we are going 
> to instantiate/realize the specific models of the AST2600 SoC. the 
> GPIO 1.8v is one of these extra controllers. 

This looks like a much better way to do this!
> 
> Thanks,
> 
> C.
> 
> > v4:
> > - proper interupt handling thanks to Andrew
> > - switch statements for reading and writing suggested by Peter
> > - some small cleanups suggested by Alexey
> > 
> > v3:
> > - didn't have each gpio set up as an irq 
> > - now can't access set AC on ast2400 (only exists on ast2500)
> > - added ast2600 implementation (patch 3)
> > - renamed a couple of variables for clarity
> > 
> > v2: Addressed Andrew's feedback, added debounce regs, renamed
> > get/set to
> > read/write to minimise confusion with a 'set' of registers.
> > 
> > Rashmica Gupta (3):
> >   hw/gpio: Add basic Aspeed GPIO model for AST2400 and AST2500
> >   aspeed: add a GPIO controller to the SoC
> >   hw/gpio: Add in AST2600 specific implementation
> > 
> >  include/hw/arm/aspeed_soc.h   |    3 +
> >  include/hw/gpio/aspeed_gpio.h |  100 ++++
> >  hw/arm/aspeed_soc.c           |   17 +
> >  hw/gpio/aspeed_gpio.c         | 1006
> > +++++++++++++++++++++++++++++++++
> >  hw/gpio/Makefile.objs         |    1 +
> >  5 files changed, 1127 insertions(+)
> >  create mode 100644 include/hw/gpio/aspeed_gpio.h
> >  create mode 100644 hw/gpio/aspeed_gpio.c
> >