| Message ID | 20221102085256.81139-1-lei4.wang@intel.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | Support for new CPU model SapphireRapids | expand |
Kindly ping for any comments:) BR, Lei On 11/2/2022 4:52 PM, Wang, Lei wrote: > This series aims to add a new CPU model SapphireRapids, and tries to > address the problem stated in > https://lore.kernel.org/all/20220812055751.14553-1-lei4.wang@intel.com/T/#mcf67dbd1ad37c65d7988c36a2b267be9afd2fb30, > so that named CPU model can define its own AMX values, and QEMU won't > pass the wrong AMX values to KVM in future platforms if they have > different values supported. > > The original patch is > https://lore.kernel.org/all/20220812055751.14553-1-lei4.wang@intel.com/T/#u. > > --- > > Changelog: > > v2: > - Fix when passing all zeros of AMX-related CPUID, QEMU will warn > unsupported. > - Remove unnecessary function definition and make code cleaner. > - Fix some typos. > - v1: > https://lore.kernel.org/qemu-devel/20221027020036.373140-1-lei4.wang@intel.com/T/#t > > Wang, Lei (6): > i386: Introduce FeatureWordInfo for AMX CPUID leaf 0x1D and 0x1E > i386: Remove unused parameter "uint32_t bit" in > feature_word_description() > i386: Introduce new struct "MultiBitFeatureInfo" for multi-bit > features > i386: Mask and report unavailable multi-bit feature values > i386: Initialize AMX CPUID leaves with corresponding env->features[] > leaves > i386: Add new CPU model SapphireRapids > > target/i386/cpu-internal.h | 11 ++ > target/i386/cpu.c | 311 +++++++++++++++++++++++++++++++++++-- > target/i386/cpu.h | 16 ++ > 3 files changed, 322 insertions(+), 16 deletions(-) >
This series aims to add a new CPU model SapphireRapids, and tries to address the problem stated in https://lore.kernel.org/all/20220812055751.14553-1-lei4.wang@intel.com/T/#mcf67dbd1ad37c65d7988c36a2b267be9afd2fb30, so that named CPU model can define its own AMX values, and QEMU won't pass the wrong AMX values to KVM in future platforms if they have different values supported. The original patch is https://lore.kernel.org/all/20220812055751.14553-1-lei4.wang@intel.com/T/#u. --- Changelog: v2: - Fix when passing all zeros of AMX-related CPUID, QEMU will warn unsupported. - Remove unnecessary function definition and make code cleaner. - Fix some typos. - v1: https://lore.kernel.org/qemu-devel/20221027020036.373140-1-lei4.wang@intel.com/T/#t Wang, Lei (6): i386: Introduce FeatureWordInfo for AMX CPUID leaf 0x1D and 0x1E i386: Remove unused parameter "uint32_t bit" in feature_word_description() i386: Introduce new struct "MultiBitFeatureInfo" for multi-bit features i386: Mask and report unavailable multi-bit feature values i386: Initialize AMX CPUID leaves with corresponding env->features[] leaves i386: Add new CPU model SapphireRapids target/i386/cpu-internal.h | 11 ++ target/i386/cpu.c | 311 +++++++++++++++++++++++++++++++++++-- target/i386/cpu.h | 16 ++ 3 files changed, 322 insertions(+), 16 deletions(-)