Show patches with: Submitter = Frank Chang       |    State = Action Required       |   1100 patches
« 1 2 3 4 … 10 11 »
Patch Series A/R/T S/W/F Date Submitter Delegate State
[13/17] target/riscv: rvv-1.0: Add Zve32f support for scalar fp insns Add RISC-V RVV Zve32f and Zve64f extensions - 1 - --- 2021-12-29 Frank Chang New
[12/17] target/riscv: rvv-1.0: Add Zve32f support for configuration insns Add RISC-V RVV Zve32f and Zve64f extensions - 1 - --- 2021-12-29 Frank Chang New
[11/17] target/riscv: rvv-1.0: Add Zve32f extension into RISC-V Add RISC-V RVV Zve32f and Zve64f extensions - 1 - --- 2021-12-29 Frank Chang New
[10/17] target/riscv: rvv-1.0: Allow Zve64f extension to be turned on Add RISC-V RVV Zve32f and Zve64f extensions - 1 - --- 2021-12-29 Frank Chang New
[09/17] target/riscv: rvv-1.0: Add Zve64f support for narrowing type-convert insns Add RISC-V RVV Zve32f and Zve64f extensions - 1 - --- 2021-12-29 Frank Chang New
[08/17] target/riscv: rvv-1.0: Add Zve64f support for widening type-convert insns Add RISC-V RVV Zve32f and Zve64f extensions - 1 - --- 2021-12-29 Frank Chang New
[07/17] target/riscv: rvv-1.0: Add Zve64f support for single-width fp reduction insns Add RISC-V RVV Zve32f and Zve64f extensions - 1 - --- 2021-12-29 Frank Chang New
[06/17] target/riscv: rvv-1.0: Add Zve64f support for scalar fp insns Add RISC-V RVV Zve32f and Zve64f extensions - 1 - --- 2021-12-29 Frank Chang New
[05/17] target/riscv: rvv-1.0: Add Zve64f support for vsmul.vv and vsmul.vx insns Add RISC-V RVV Zve32f and Zve64f extensions - 1 - --- 2021-12-29 Frank Chang New
[04/17] target/riscv: rvv-1.0: Add Zve64f support for vmulh variant insns Add RISC-V RVV Zve32f and Zve64f extensions - 1 - --- 2021-12-29 Frank Chang New
[03/17] target/riscv: rvv-1.0: Add Zve64f support for load and store insns Add RISC-V RVV Zve32f and Zve64f extensions - - - --- 2021-12-29 Frank Chang New
[02/17] target/riscv: rvv-1.0: Add Zve64f support for configuration insns Add RISC-V RVV Zve32f and Zve64f extensions - 1 - --- 2021-12-29 Frank Chang New
[01/17] target/riscv: rvv-1.0: Add Zve64f extension into RISC-V Add RISC-V RVV Zve32f and Zve64f extensions - 1 - --- 2021-12-29 Frank Chang New
[3/3] target/riscv: rvv-1.0: Call the correct RVF/RVD check funtion for narrowing fp/int type-conve… Fix RVV calling incorrect RFV/RVD check functions bug - - - --- 2021-12-29 Frank Chang New
[2/3] target/riscv: rvv-1.0: Call the correct RVF/RVD check funtion for widening fp/int type-conver… Fix RVV calling incorrect RFV/RVD check functions bug - - - --- 2021-12-29 Frank Chang New
[1/3] target/riscv: rvv-1.0: Call the correct RVF/RVD check funtion for widening fp insns Fix RVV calling incorrect RFV/RVD check functions bug - - - --- 2021-12-29 Frank Chang New
[v2] hw/sd: Add SDHC support for SD card SPI-mode [v2] hw/sd: Add SDHC support for SD card SPI-mode - 2 - --- 2021-12-28 Frank Chang New
hw/sd: Add SDHC support for SD card SPI-mode hw/sd: Add SDHC support for SD card SPI-mode - 2 - --- 2021-12-28 Frank Chang New
[v11,77/77] target/riscv: rvv-1.0: Add ELEN checks for widening and narrowing instructions support vector extension v1.0 1 - - --- 2021-12-10 Frank Chang New
[v11,76/77] target/riscv: rvv-1.0: update opivv_vadc_check() comment support vector extension v1.0 - 1 - --- 2021-12-10 Frank Chang New
[v11,75/77] target/riscv: rvv-1.0: rename vmandnot.mm and vmornot.mm to vmandn.mm and vmorn.mm support vector extension v1.0 - 1 - --- 2021-12-10 Frank Chang New
[v11,74/77] target/riscv: rvv-1.0: add vector unit-stride mask load/store insns support vector extension v1.0 1 - - --- 2021-12-10 Frank Chang New
[v11,73/77] target/riscv: rvv-1.0: add evl parameter to vext_ldst_us() support vector extension v1.0 - 1 - --- 2021-12-10 Frank Chang New
[v11,72/77] target/riscv: rvv-1.0: add vsetivli instruction support vector extension v1.0 - 1 - --- 2021-12-10 Frank Chang New
[v11,71/77] target/riscv: rvv-1.0: rename r2_zimm to r2_zimm11 support vector extension v1.0 - 1 - --- 2021-12-10 Frank Chang New
[v11,70/77] target/riscv: rvv-1.0: floating-point reciprocal estimate instruction support vector extension v1.0 1 - - --- 2021-12-10 Frank Chang New
[v11,69/77] target/riscv: rvv-1.0: floating-point reciprocal square-root estimate instruction support vector extension v1.0 1 - - --- 2021-12-10 Frank Chang New
[v11,68/77] target/riscv: gdb: support vector registers for rv64 & rv32 support vector extension v1.0 1 - - --- 2021-12-10 Frank Chang New
[v11,67/77] target/riscv: rvv-1.0: trigger illegal instruction exception if frm is not valid support vector extension v1.0 1 - - --- 2021-12-10 Frank Chang New
[v11,66/77] target/riscv: rvv-1.0: implement vstart CSR support vector extension v1.0 - 1 - --- 2021-12-10 Frank Chang New
[v11,65/77] target/riscv: rvv-1.0: relax RV_VLEN_MAX to 1024-bits support vector extension v1.0 - 1 - --- 2021-12-10 Frank Chang New
[v11,64/77] target/riscv: rvv-1.0: narrowing floating-point/integer type-convert support vector extension v1.0 1 - - --- 2021-12-10 Frank Chang New
[v11,63/77] target/riscv: add "set round to odd" rounding mode helper function support vector extension v1.0 1 - - --- 2021-12-10 Frank Chang New
[v11,62/77] target/riscv: rvv-1.0: widening floating-point/integer type-convert support vector extension v1.0 1 - - --- 2021-12-10 Frank Chang New
[v11,61/77] target/riscv: rvv-1.0: floating-point/integer type-convert instructions support vector extension v1.0 - 1 - --- 2021-12-10 Frank Chang New
[v11,60/77] target/riscv: introduce floating-point rounding mode enum support vector extension v1.0 - 1 - --- 2021-12-10 Frank Chang New
[v11,59/77] target/riscv: rvv-1.0: floating-point min/max instructions support vector extension v1.0 - 1 - --- 2021-12-10 Frank Chang New
[v11,58/77] target/riscv: rvv-1.0: remove integer extract instruction support vector extension v1.0 - 1 - --- 2021-12-10 Frank Chang New
[v11,57/77] target/riscv: rvv-1.0: remove vmford.vv and vmford.vf support vector extension v1.0 - 1 - --- 2021-12-10 Frank Chang New
[v11,56/77] target/riscv: rvv-1.0: remove widening saturating scaled multiply-add support vector extension v1.0 - 1 - --- 2021-12-10 Frank Chang New
[v11,55/77] target/riscv: rvv-1.0: single-width scaling shift instructions support vector extension v1.0 - 1 - --- 2021-12-10 Frank Chang New
[v11,54/77] target/riscv: rvv-1.0: widening floating-point reduction instructions support vector extension v1.0 - 1 - --- 2021-12-10 Frank Chang New
[v11,53/77] target/riscv: rvv-1.0: single-width floating-point reduction support vector extension v1.0 - 1 - --- 2021-12-10 Frank Chang New
[v11,52/77] target/riscv: rvv-1.0: narrowing fixed-point clip instructions support vector extension v1.0 - 1 - --- 2021-12-10 Frank Chang New
[v11,51/77] target/riscv: rvv-1.0: floating-point slide instructions support vector extension v1.0 - 1 - --- 2021-12-10 Frank Chang New
[v11,50/77] target/riscv: rvv-1.0: slide instructions support vector extension v1.0 - 1 - --- 2021-12-10 Frank Chang New
[v11,49/77] target/riscv: rvv-1.0: mask-register logical instructions support vector extension v1.0 - 1 - --- 2021-12-10 Frank Chang New
[v11,48/77] target/riscv: rvv-1.0: floating-point compare instructions support vector extension v1.0 - 1 - --- 2021-12-10 Frank Chang New
[v11,47/77] target/riscv: rvv-1.0: integer comparison instructions support vector extension v1.0 - 1 - --- 2021-12-10 Frank Chang New
[v11,46/77] target/riscv: rvv-1.0: single-width saturating add and subtract instructions support vector extension v1.0 - 1 - --- 2021-12-10 Frank Chang New
[v11,45/77] target/riscv: rvv-1.0: widening integer multiply-add instructions support vector extension v1.0 - 1 - --- 2021-12-10 Frank Chang New
[v11,44/77] target/riscv: rvv-1.0: narrowing integer right shift instructions support vector extension v1.0 - 1 - --- 2021-12-10 Frank Chang New
[v11,43/77] target/riscv: rvv-1.0: integer add-with-carry/subtract-with-borrow support vector extension v1.0 - 1 - --- 2021-12-10 Frank Chang New
[v11,42/77] target/riscv: rvv-1.0: single-width bit shift instructions support vector extension v1.0 - 1 - --- 2021-12-10 Frank Chang New
[v11,41/77] target/riscv: rvv-1.0: single-width averaging add and subtract instructions support vector extension v1.0 - 1 - --- 2021-12-10 Frank Chang New
[v11,40/77] target/riscv: rvv-1.0: integer extension instructions support vector extension v1.0 - 1 - --- 2021-12-10 Frank Chang New
[v11,39/77] target/riscv: rvv-1.0: whole register move instructions support vector extension v1.0 1 - - --- 2021-12-10 Frank Chang New
[v11,38/77] target/riscv: rvv-1.0: floating-point scalar move instructions support vector extension v1.0 1 - - --- 2021-12-10 Frank Chang New
[v11,37/77] target/riscv: rvv-1.0: floating-point move instruction support vector extension v1.0 - 1 - --- 2021-12-10 Frank Chang New
[v11,36/77] target/riscv: rvv-1.0: integer scalar move instructions support vector extension v1.0 1 1 - --- 2021-12-10 Frank Chang New
[v11,35/77] target/riscv: rvv-1.0: register gather instructions support vector extension v1.0 - 1 - --- 2021-12-10 Frank Chang New
[v11,34/77] target/riscv: rvv-1.0: allow load element with sign-extended support vector extension v1.0 - 2 - --- 2021-12-10 Frank Chang New
[v11,33/77] target/riscv: rvv-1.0: element index instruction support vector extension v1.0 - 2 - --- 2021-12-10 Frank Chang New
[v11,32/77] target/riscv: rvv-1.0: iota instruction support vector extension v1.0 - 2 - --- 2021-12-10 Frank Chang New
[v11,31/77] target/riscv: rvv-1.0: set-X-first mask bit instructions support vector extension v1.0 - 2 - --- 2021-12-10 Frank Chang New
[v11,30/77] target/riscv: rvv-1.0: find-first-set mask bit instruction support vector extension v1.0 - 2 - --- 2021-12-10 Frank Chang New
[v11,29/77] target/riscv: rvv-1.0: count population in mask instruction support vector extension v1.0 - 2 - --- 2021-12-10 Frank Chang New
[v11,28/77] target/riscv: rvv-1.0: floating-point classify instructions support vector extension v1.0 - 2 - --- 2021-12-10 Frank Chang New
[v11,27/77] target/riscv: rvv-1.0: floating-point square-root instruction support vector extension v1.0 - 2 - --- 2021-12-10 Frank Chang New
[v11,26/77] target/riscv: rvv-1.0: take fractional LMUL into vector max elements calculation support vector extension v1.0 - 2 - --- 2021-12-10 Frank Chang New
[v11,25/77] target/riscv: rvv-1.0: update vext_max_elems() for load/store insns support vector extension v1.0 - 1 - --- 2021-12-10 Frank Chang New
[v11,24/77] target/riscv: rvv-1.0: load/store whole register instructions support vector extension v1.0 - 1 - --- 2021-12-10 Frank Chang New
[v11,23/77] target/riscv: rvv-1.0: fault-only-first unit stride load support vector extension v1.0 - 2 - --- 2021-12-10 Frank Chang New
[v11,22/77] target/riscv: rvv-1.0: fix address index overflow bug of indexed load/store insns support vector extension v1.0 - 2 - --- 2021-12-10 Frank Chang New
[v11,21/77] target/riscv: rvv-1.0: index load and store instructions support vector extension v1.0 - 1 - --- 2021-12-10 Frank Chang New
[v11,20/77] target/riscv: rvv-1.0: stride load and store instructions support vector extension v1.0 - 1 - --- 2021-12-10 Frank Chang New
[v11,19/77] target/riscv: rvv-1.0: configure instructions support vector extension v1.0 - 2 - --- 2021-12-10 Frank Chang New
[v11,18/77] target/riscv: rvv-1.0: remove amo operations instructions support vector extension v1.0 - 1 - --- 2021-12-10 Frank Chang New
[v11,17/77] target/riscv: rvv:1.0: add translation-time nan-box helper function support vector extension v1.0 - 2 - --- 2021-12-10 Frank Chang New
[v11,16/77] target/riscv: introduce more imm value modes in translator functions support vector extension v1.0 - 2 - --- 2021-12-10 Frank Chang New
[v11,15/77] target/riscv: rvv-1.0: update check functions support vector extension v1.0 - 1 - --- 2021-12-10 Frank Chang New
[v11,14/77] target/riscv: rvv-1.0: add VMA and VTA support vector extension v1.0 - 2 - --- 2021-12-10 Frank Chang New
[v11,13/77] target/riscv: rvv-1.0: add fractional LMUL support vector extension v1.0 - 2 - --- 2021-12-10 Frank Chang New
[v11,12/77] target/riscv: rvv-1.0: remove MLEN calculations support vector extension v1.0 - 2 - --- 2021-12-10 Frank Chang New
[v11,11/77] target/riscv: rvv-1.0: check MSTATUS_VS when accessing vector csr registers support vector extension v1.0 - 2 - --- 2021-12-10 Frank Chang New
[v11,10/77] target/riscv: rvv-1.0: add vlenb register support vector extension v1.0 - 2 - --- 2021-12-10 Frank Chang New
[v11,09/77] target/riscv: rvv-1.0: add vcsr register support vector extension v1.0 - 2 - --- 2021-12-10 Frank Chang New
[v11,08/77] target/riscv: rvv-1.0: remove rvv related codes from fcsr registers support vector extension v1.0 - 2 - --- 2021-12-10 Frank Chang New
[v11,07/77] target/riscv: rvv-1.0: add translation-time vector context status support vector extension v1.0 - 2 - --- 2021-12-10 Frank Chang New
[v11,06/77] target/riscv: rvv-1.0: introduce writable misa.v field support vector extension v1.0 - 2 - --- 2021-12-10 Frank Chang New
[v11,05/77] target/riscv: rvv-1.0: add sstatus VS field support vector extension v1.0 - 2 - --- 2021-12-10 Frank Chang New
[v11,04/77] target/riscv: rvv-1.0: set mstatus.SD bit if mstatus.VS is dirty support vector extension v1.0 - 2 - --- 2021-12-10 Frank Chang New
[v11,03/77] target/riscv: rvv-1.0: add mstatus VS field support vector extension v1.0 - 2 - --- 2021-12-10 Frank Chang New
[v11,02/77] target/riscv: Use FIELD_EX32() to extract wd field support vector extension v1.0 - 2 - --- 2021-12-10 Frank Chang New
[v11,01/77] target/riscv: drop vector 0.7.1 and add 1.0 support support vector extension v1.0 - 3 - --- 2021-12-10 Frank Chang New
[v6,8/8] target/riscv: zfh: add Zfhmin cpu property target/riscv: support Zfh, Zfhmin extension v0.1 - 1 - --- 2021-12-10 Frank Chang New
[v6,7/8] target/riscv: zfh: implement zfhmin extension target/riscv: support Zfh, Zfhmin extension v0.1 - 2 - --- 2021-12-10 Frank Chang New
[v6,6/8] target/riscv: zfh: add Zfh cpu property target/riscv: support Zfh, Zfhmin extension v0.1 - 1 - --- 2021-12-10 Frank Chang New
[v6,5/8] target/riscv: zfh: half-precision floating-point classify target/riscv: support Zfh, Zfhmin extension v0.1 - 2 - --- 2021-12-10 Frank Chang New
[v6,4/8] target/riscv: zfh: half-precision floating-point compare target/riscv: support Zfh, Zfhmin extension v0.1 - 2 - --- 2021-12-10 Frank Chang New
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