Show patches with: Submitter = LIU Zhiwei       |   1061 patches
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Patch Series A/R/T S/W/F Date Submitter Delegate State
[v12,06/61] target/riscv: add vector stride load and store instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-07-01 LIU Zhiwei New
[v12,05/61] target/riscv: add an internals.h header target/riscv: support vector extension v0.7.1 - 2 - --- 2020-07-01 LIU Zhiwei New
[v12,04/61] target/riscv: add vector configure instruction target/riscv: support vector extension v0.7.1 - 2 - --- 2020-07-01 LIU Zhiwei New
[v12,03/61] target/riscv: support vector extension csr target/riscv: support vector extension v0.7.1 - 2 - --- 2020-07-01 LIU Zhiwei New
[v12,02/61] target/riscv: implementation-defined constant parameters target/riscv: support vector extension v0.7.1 - 2 - --- 2020-07-01 LIU Zhiwei New
[v12,01/61] target/riscv: add vector extension field in CPURISCVState target/riscv: support vector extension v0.7.1 1 1 - --- 2020-07-01 LIU Zhiwei New
[1/1] tcg/tcg-op: nonatomic_op should work with smaller memop [1/1] tcg/tcg-op: nonatomic_op should work with smaller memop - - - --- 2020-07-01 LIU Zhiwei New
[2/2] target/riscv: Do amo*.w insns operate with 32 bits target/riscv: fixup atomic implementation - - - --- 2020-06-29 LIU Zhiwei New
[1/2] tcg/tcg-op: Fix nonatomic_op load with MO_SIGN target/riscv: fixup atomic implementation - - - --- 2020-06-29 LIU Zhiwei New
[6/6] target/riscv: clean up fmv.w.x target/riscv: NaN-boxing for multiple precison - 1 - --- 2020-06-26 LIU Zhiwei New
[5/6] target/riscv: Flush not valid NaN-boxing input to canonical NaN target/riscv: NaN-boxing for multiple precison - - - --- 2020-06-26 LIU Zhiwei New
[4/6] target/riscv: check before allocating TCG temps target/riscv: NaN-boxing for multiple precison - 1 - --- 2020-06-26 LIU Zhiwei New
[3/6] target/riscv: Check for LEGAL NaN-boxing target/riscv: NaN-boxing for multiple precison - - - --- 2020-06-26 LIU Zhiwei New
[2/6] target/riscv: NaN-boxing compute, sign-injection and convert instructions. target/riscv: NaN-boxing for multiple precison - 1 - --- 2020-06-26 LIU Zhiwei New
[1/6] target/riscv: move gen_nanbox_fpr to translate.c target/riscv: NaN-boxing for multiple precison - 1 - --- 2020-06-26 LIU Zhiwei New
[v11,61/61] target/riscv: configure and turn on vector extension from command line target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,60/61] target/riscv: vector compress instruction target/riscv: support vector extension v0.7.1 - 1 - --- 2020-06-23 LIU Zhiwei New
[v11,59/61] target/riscv: vector register gather instruction target/riscv: support vector extension v0.7.1 - 1 - --- 2020-06-23 LIU Zhiwei New
[v11,58/61] target/riscv: vector slide instructions target/riscv: support vector extension v0.7.1 - 1 - --- 2020-06-23 LIU Zhiwei New
[v11,57/61] target/riscv: floating-point scalar move instructions target/riscv: support vector extension v0.7.1 - 1 - --- 2020-06-23 LIU Zhiwei New
[v11,56/61] target/riscv: integer scalar move instruction target/riscv: support vector extension v0.7.1 - 1 - --- 2020-06-23 LIU Zhiwei New
[v11,55/61] target/riscv: integer extract instruction target/riscv: support vector extension v0.7.1 - 1 - --- 2020-06-23 LIU Zhiwei New
[v11,54/61] target/riscv: vector element index instruction target/riscv: support vector extension v0.7.1 - 1 - --- 2020-06-23 LIU Zhiwei New
[v11,53/61] target/riscv: vector iota instruction target/riscv: support vector extension v0.7.1 - 1 - --- 2020-06-23 LIU Zhiwei New
[v11,52/61] target/riscv: set-X-first mask bit target/riscv: support vector extension v0.7.1 - 1 - --- 2020-06-23 LIU Zhiwei New
[v11,51/61] target/riscv: vmfirst find-first-set mask bit target/riscv: support vector extension v0.7.1 - 1 - --- 2020-06-23 LIU Zhiwei New
[v11,50/61] target/riscv: vector mask population count vmpopc target/riscv: support vector extension v0.7.1 - 1 - --- 2020-06-23 LIU Zhiwei New
[v11,49/61] target/riscv: vector mask-register logical instructions target/riscv: support vector extension v0.7.1 - 1 - --- 2020-06-23 LIU Zhiwei New
[v11,48/61] target/riscv: vector widening floating-point reduction instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,47/61] target/riscv: vector single-width floating-point reduction instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,46/61] target/riscv: vector wideing integer reduction instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,45/61] target/riscv: vector single-width integer reduction instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,44/61] target/riscv: narrowing floating-point/integer type-convert instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,43/61] target/riscv: widening floating-point/integer type-convert instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,42/61] target/riscv: vector floating-point/integer type-convert instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,41/61] target/riscv: vector floating-point merge instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,40/61] target/riscv: vector floating-point classify instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,39/61] target/riscv: vector floating-point compare instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,38/61] target/riscv: vector floating-point sign-injection instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,37/61] target/riscv: vector floating-point min/max instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,36/61] target/riscv: vector floating-point square-root instruction target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,35/61] target/riscv: vector widening floating-point fused multiply-add instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,34/61] target/riscv: vector single-width floating-point fused multiply-add instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,33/61] target/riscv: vector widening floating-point multiply target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,32/61] target/riscv: vector single-width floating-point multiply/divide instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,31/61] target/riscv: vector widening floating-point add/subtract instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,30/61] target/riscv: vector single-width floating-point add/subtract instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,29/61] target/riscv: vector narrowing fixed-point clip instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,28/61] target/riscv: vector single-width scaling shift instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,27/61] target/riscv: vector widening saturating scaled multiply-add target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,26/61] target/riscv: vector single-width fractional multiply with rounding and saturation target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,25/61] target/riscv: vector single-width averaging add and subtract target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,24/61] target/riscv: vector single-width saturating add and subtract target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,23/61] target/riscv: vector integer merge and move instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,22/61] target/riscv: vector widening integer multiply-add instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,21/61] target/riscv: vector single-width integer multiply-add instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,20/61] target/riscv: vector widening integer multiply instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,19/61] target/riscv: vector integer divide instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,18/61] target/riscv: vector single-width integer multiply instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,17/61] target/riscv: vector integer min/max instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,16/61] target/riscv: vector integer comparison instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,15/61] target/riscv: vector narrowing integer right shift instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,14/61] target/riscv: vector single-width bit shift instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,13/61] target/riscv: vector bitwise logical instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,12/61] target/riscv: vector integer add-with-carry / subtract-with-borrow instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,11/61] target/riscv: vector widening integer add and subtract target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,10/61] target/riscv: vector single-width integer add and subtract target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,09/61] target/riscv: add vector amo operations target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,08/61] target/riscv: add fault-only-first unit stride load target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,07/61] target/riscv: add vector index load and store instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,06/61] target/riscv: add vector stride load and store instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,05/61] target/riscv: add an internals.h header target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,04/61] target/riscv: add vector configure instruction target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,03/61] target/riscv: support vector extension csr target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,02/61] target/riscv: implementation-defined constant parameters target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-23 LIU Zhiwei New
[v11,01/61] target/riscv: add vector extension field in CPURISCVState target/riscv: support vector extension v0.7.1 1 1 - --- 2020-06-23 LIU Zhiwei New
[v10,61/61] target/riscv: configure and turn on vector extension from command line target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-20 LIU Zhiwei New
[v10,60/61] target/riscv: vector compress instruction target/riscv: support vector extension v0.7.1 - 1 - --- 2020-06-20 LIU Zhiwei New
[v10,59/61] target/riscv: vector register gather instruction target/riscv: support vector extension v0.7.1 - 1 - --- 2020-06-20 LIU Zhiwei New
[v10,58/61] target/riscv: vector slide instructions target/riscv: support vector extension v0.7.1 - 1 - --- 2020-06-20 LIU Zhiwei New
[v10,57/61] target/riscv: floating-point scalar move instructions target/riscv: support vector extension v0.7.1 - 1 - --- 2020-06-20 LIU Zhiwei New
[v10,56/61] target/riscv: integer scalar move instruction target/riscv: support vector extension v0.7.1 - 1 - --- 2020-06-20 LIU Zhiwei New
[v10,55/61] target/riscv: integer extract instruction target/riscv: support vector extension v0.7.1 - 1 - --- 2020-06-20 LIU Zhiwei New
[v10,54/61] target/riscv: vector element index instruction target/riscv: support vector extension v0.7.1 - 1 - --- 2020-06-20 LIU Zhiwei New
[v10,53/61] target/riscv: vector iota instruction target/riscv: support vector extension v0.7.1 - 1 - --- 2020-06-20 LIU Zhiwei New
[v10,52/61] target/riscv: set-X-first mask bit target/riscv: support vector extension v0.7.1 - 1 - --- 2020-06-20 LIU Zhiwei New
[v10,51/61] target/riscv: vmfirst find-first-set mask bit target/riscv: support vector extension v0.7.1 - 1 - --- 2020-06-20 LIU Zhiwei New
[v10,50/61] target/riscv: vector mask population count vmpopc target/riscv: support vector extension v0.7.1 - 1 - --- 2020-06-20 LIU Zhiwei New
[v10,49/61] target/riscv: vector mask-register logical instructions target/riscv: support vector extension v0.7.1 - 1 - --- 2020-06-20 LIU Zhiwei New
[v10,48/61] target/riscv: vector widening floating-point reduction instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-20 LIU Zhiwei New
[v10,47/61] target/riscv: vector single-width floating-point reduction instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-20 LIU Zhiwei New
[v10,46/61] target/riscv: vector wideing integer reduction instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-20 LIU Zhiwei New
[v10,45/61] target/riscv: vector single-width integer reduction instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-20 LIU Zhiwei New
[v10,44/61] target/riscv: narrowing floating-point/integer type-convert instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-20 LIU Zhiwei New
[v10,43/61] target/riscv: widening floating-point/integer type-convert instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-20 LIU Zhiwei New
[v10,42/61] target/riscv: vector floating-point/integer type-convert instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-20 LIU Zhiwei New
[v10,41/61] target/riscv: vector floating-point merge instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-20 LIU Zhiwei New
[v10,40/61] target/riscv: vector floating-point classify instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-20 LIU Zhiwei New
[v10,39/61] target/riscv: vector floating-point compare instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-20 LIU Zhiwei New
[v10,38/61] target/riscv: vector floating-point sign-injection instructions target/riscv: support vector extension v0.7.1 - 2 - --- 2020-06-20 LIU Zhiwei New
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