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Patch
Series
A/R/T
S/W/F
Date
Submitter
Delegate
State
[PULL,44/47] target: riscv: Add Svvptc extension support
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,43/47] hw/riscv: Respect firmware ELF entry point
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,42/47] bsd-user: Add RISC-V 64-bit Target Configuration and Debug XML Files
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,41/47] bsd-user: Implement set_mcontext and get_ucontext_sigreturn for RISCV
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,40/47] bsd-user: Implement 'get_mcontext' for RISC-V
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,39/47] bsd-user: Implement RISC-V signal trampoline setup functions
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,38/47] bsd-user: Define RISC-V signal handling structures and constants
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,37/47] bsd-user: Add generic RISC-V64 target definitions
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,36/47] bsd-user: Define RISC-V system call structures and constants
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,35/47] bsd-user: Define RISC-V VM parameters and helper functions
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,34/47] bsd-user: Add RISC-V thread setup and initialization support
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,33/47] bsd-user: Implement RISC-V sysarch system call emulation
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,32/47] bsd-user: Add RISC-V signal trampoline setup function
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,31/47] bsd-user: Define RISC-V register structures and register copying
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,30/47] bsd-user: Add RISC-V ELF definitions and hardware capability detection
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,29/47] bsd-user: Implement RISC-V TLS register setup
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,28/47] bsd-user: Implement RISC-V CPU register cloning and reset functions
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,27/47] bsd-user: Add RISC-V CPU execution loop and syscall handling
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,26/47] bsd-user: Implement RISC-V CPU initialization and main loop
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,25/47] docs/specs: add riscv-iommu
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,24/47] qtest/riscv-iommu-test: add init queues test
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
1 1 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,23/47] hw/riscv/riscv-iommu: add DBG support
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 2 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,22/47] hw/riscv/riscv-iommu: add ATS support
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
1 1 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,21/47] hw/riscv/riscv-iommu: add Address Translation Cache (IOATC)
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
1 1 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,20/47] test/qtest: add riscv-iommu-pci tests
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
1 1 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,19/47] hw/riscv/virt.c: support for RISC-V IOMMU PCIDevice hotplug
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 2 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,18/47] hw/riscv: add riscv-iommu-pci reference device
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 2 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,17/47] pci-ids.rst: add Red Hat pci-id for RISC-V IOMMU device
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 2 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,16/47] hw/riscv: add RISC-V IOMMU base emulation
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
1 - -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,15/47] hw/riscv: add riscv-iommu-bits.h
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 3 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,14/47] exec/memtxattr: add process identifier to the transaction attributes
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 3 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,13/47] target/riscv: Add textra matching condition for the triggers
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,12/47] target/riscv: Preliminary textra trigger CSR writting support
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,11/47] util/util/cpuinfo-riscv.c: fix riscv64 build on musl libc
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,10/47] target/riscv/cpu.c: Add 'fcsr' register to QEMU log as a part of F extension
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 2 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,09/47] target/riscv: Stop timer with infinite timecmp
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,08/47] target/riscv/kvm: Fix the group bit setting of AIA
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,07/47] target: riscv: Enable Bit Manip for OpenTitan Ibex CPU
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,06/47] target/riscv: fix za64rs enabling
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 2 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,05/47] target/riscv/tcg/tcg-cpu.c: consider MISA bit choice in implied rule
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,04/47] tests/acpi: Add expected ACPI SRAT AML file for RISC-V
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
1 1 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,03/47] tests/qtest/bios-tables-test.c: Enable numamem testing for RISC-V
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
1 1 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,02/47] tests/acpi: Add empty ACPI SRAT data file for RISC-V
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
1 1 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
[PULL,01/47] target/riscv: Add a property to set vl to ceil(AVL/2)
- 1 -
-
-
-
2024-09-12
Alistair Francis
New
[PULL,00/47] riscv-to-apply queue
- - -
-
-
-
2024-09-12
Alistair Francis
New
vfio/pci: Fix null pointer deference from error API
vfio/pci: Fix null pointer deference from error API
- - -
-
-
-
2024-09-12
Jim Shu
New
[v3,29/29] target/arm: Convert scalar [US]QSHRN, [US]QRSHRN, SQSHRUN to decodetree
target/arm: AdvSIMD decodetree conversion, part 4
- 1 -
-
-
-
2024-09-12
Richard Henderson
New
[v3,28/29] target/arm: Convert vector [US]QSHRN, [US]QRSHRN, SQSHRUN to decodetree
target/arm: AdvSIMD decodetree conversion, part 4
- 1 -
-
-
-
2024-09-12
Richard Henderson
New
[v3,27/29] target/arm: Convert SQSHL, UQSHL, SQSHLU (immediate) to decodetree
target/arm: AdvSIMD decodetree conversion, part 4
- 1 -
-
-
-
2024-09-12
Richard Henderson
New
[v3,26/29] target/arm: Widen NeonGenNarrowEnvFn return to 64 bits
target/arm: AdvSIMD decodetree conversion, part 4
- 1 -
-
-
-
2024-09-12
Richard Henderson
New
[v3,25/29] target/arm: Convert VQSHL, VQSHLU to gvec
target/arm: AdvSIMD decodetree conversion, part 4
- 1 -
-
-
-
2024-09-12
Richard Henderson
New
[v3,24/29] target/arm: Convert handle_scalar_simd_shli to decodetree
target/arm: AdvSIMD decodetree conversion, part 4
- 1 -
-
-
-
2024-09-12
Richard Henderson
New
[v3,23/29] target/arm: Convert handle_scalar_simd_shri to decodetree
target/arm: AdvSIMD decodetree conversion, part 4
- 1 -
-
-
-
2024-09-12
Richard Henderson
New
[v3,22/29] target/arm: Convert SHRN, RSHRN to decodetree
target/arm: AdvSIMD decodetree conversion, part 4
- 1 -
-
-
-
2024-09-12
Richard Henderson
New
[v3,21/29] target/arm: Split out subroutines of handle_shri_with_rndacc
target/arm: AdvSIMD decodetree conversion, part 4
- 1 -
-
-
-
2024-09-12
Richard Henderson
New
[v3,20/29] target/arm: Push tcg_rnd into handle_shri_with_rndacc
target/arm: AdvSIMD decodetree conversion, part 4
- 2 -
-
-
-
2024-09-12
Richard Henderson
New
[v3,19/29] target/arm: Convert SSHLL, USHLL to decodetree
target/arm: AdvSIMD decodetree conversion, part 4
- 1 -
-
-
-
2024-09-12
Richard Henderson
New
[v3,18/29] target/arm: Use {, s}extract in handle_vec_simd_wshli
target/arm: AdvSIMD decodetree conversion, part 4
- 1 -
-
-
-
2024-09-12
Richard Henderson
New
[v3,17/29] target/arm: Convert handle_vec_simd_shli to decodetree
target/arm: AdvSIMD decodetree conversion, part 4
- 1 -
-
-
-
2024-09-12
Richard Henderson
New
[v3,16/29] target/arm: Convert handle_vec_simd_shri to decodetree
target/arm: AdvSIMD decodetree conversion, part 4
- 1 -
-
-
-
2024-09-12
Richard Henderson
New
[v3,15/29] target/arm: Fix whitespace near gen_srshr64_i64
target/arm: AdvSIMD decodetree conversion, part 4
- 2 -
-
-
-
2024-09-12
Richard Henderson
New
[v3,14/29] target/arm: Introduce gen_gvec_sshr, gen_gvec_ushr
target/arm: AdvSIMD decodetree conversion, part 4
- 1 -
-
-
-
2024-09-12
Richard Henderson
New
[v3,13/29] target/arm: Convert MOVI, FMOV, ORR, BIC (vector immediate) to decodetree
target/arm: AdvSIMD decodetree conversion, part 4
- 1 -
-
-
-
2024-09-12
Richard Henderson
New
[v3,12/29] target/arm: Convert FMOVI (scalar, immediate) to decodetree
target/arm: AdvSIMD decodetree conversion, part 4
- 1 -
-
-
-
2024-09-12
Richard Henderson
New
[v3,11/29] target/arm: Convert FMAXNMV, FMINNMV, FMAXV, FMINV to decodetree
target/arm: AdvSIMD decodetree conversion, part 4
- 1 -
-
-
-
2024-09-12
Richard Henderson
New
[v3,10/29] target/arm: Convert ADDV, *ADDLV, *MAXV, *MINV to decodetree
target/arm: AdvSIMD decodetree conversion, part 4
- 1 -
-
-
-
2024-09-12
Richard Henderson
New
[v3,09/29] target/arm: Simplify do_reduction_op
target/arm: AdvSIMD decodetree conversion, part 4
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2024-09-12
Richard Henderson
New
[v3,08/29] target/arm: Convert UZP, TRN, ZIP to decodetree
target/arm: AdvSIMD decodetree conversion, part 4
- 1 -
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2024-09-12
Richard Henderson
New
[v3,07/29] target/arm: Convert TBL, TBX to decodetree
target/arm: AdvSIMD decodetree conversion, part 4
- 2 -
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2024-09-12
Richard Henderson
New
[v3,06/29] target/arm: Convert EXT to decodetree
target/arm: AdvSIMD decodetree conversion, part 4
- 2 -
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2024-09-12
Richard Henderson
New
[v3,05/29] target/arm: Use tcg_gen_extract2_i64 for EXT
target/arm: AdvSIMD decodetree conversion, part 4
- 2 -
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2024-09-12
Richard Henderson
New
[v3,04/29] target/arm: Use cmpsel in gen_sshl_vec
target/arm: AdvSIMD decodetree conversion, part 4
- 1 -
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2024-09-12
Richard Henderson
New
[v3,03/29] target/arm: Use cmpsel in gen_ushl_vec
target/arm: AdvSIMD decodetree conversion, part 4
- 1 -
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2024-09-12
Richard Henderson
New
[v3,02/29] target/arm: Replace tcg_gen_dupi_vec with constants in translate-sve.c
target/arm: AdvSIMD decodetree conversion, part 4
- 1 -
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2024-09-12
Richard Henderson
New
[v3,01/29] target/arm: Replace tcg_gen_dupi_vec with constants in gengvec.c
target/arm: AdvSIMD decodetree conversion, part 4
- 1 -
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2024-09-12
Richard Henderson
New
[5/5] hw/intc/loongarch_pch: Cleanup loongarch_pch_pic
hw/intc/loongarch_pch: Split into pic common and
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2024-09-12
Bibo Mao
New
[4/5] hw/intc/loongarch_pch: Inherit from loongarch_pic_common
hw/intc/loongarch_pch: Split into pic common and
- - -
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2024-09-12
Bibo Mao
New
[3/5] include: Add loongarch_pic_common header file
hw/intc/loongarch_pch: Split into pic common and
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2024-09-12
Bibo Mao
New
[2/5] hw/intc/loongarch_pch: Merge instance_init() into realize()
hw/intc/loongarch_pch: Split into pic common and
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2024-09-12
Bibo Mao
New
[1/5] hw/intc/loongarch_pic: Add loongarch pch pic common driver
hw/intc/loongarch_pch: Split into pic common and
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2024-09-12
Bibo Mao
New
[v2,18/18] tcg/s390x: Optimize cmpsel with constant 0/-1 arguments
tcg: Improve support for cmpsel_vec
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2024-09-11
Richard Henderson
New
[v2,17/18] tcg/s390x: Implement cmpsel_vec
tcg: Improve support for cmpsel_vec
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2024-09-11
Richard Henderson
New
[v2,16/18] tcg/ppc: Optimize cmpsel with constant 0/-1 arguments
tcg: Improve support for cmpsel_vec
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2024-09-11
Richard Henderson
New
[v2,15/18] tcg/ppc: Implement cmpsel_vec
tcg: Improve support for cmpsel_vec
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2024-09-11
Richard Henderson
New
[v2,14/18] tcg/i386: Implement vector TST{EQ,NE} for avx512
tcg: Improve support for cmpsel_vec
- 1 -
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2024-09-11
Richard Henderson
New
[v2,13/18] tcg/i386: Implement cmpsel_vec with avx512 insns
tcg: Improve support for cmpsel_vec
- - -
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2024-09-11
Richard Henderson
New
[v2,12/18] tcg/i386: Add predicate parameters to tcg_out_evex_opc
tcg: Improve support for cmpsel_vec
- 1 -
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2024-09-11
Richard Henderson
New
[v2,11/18] tcg/i386: Implement cmp_vec with avx512 insns
tcg: Improve support for cmpsel_vec
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2024-09-11
Richard Henderson
New
[v2,10/18] tcg/i386: Optimize cmpsel with constant 0 operand 3.
tcg: Improve support for cmpsel_vec
- - -
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2024-09-11
Richard Henderson
New
[v2,09/18] tcg/optimize: Optimize bitsel_vec
tcg: Improve support for cmpsel_vec
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2024-09-11
Richard Henderson
New
[v2,08/18] tcg/optimize: Optimize cmp_vec and cmpsel_vec
tcg: Improve support for cmpsel_vec
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2024-09-11
Richard Henderson
New
[v2,07/18] tcg/optimize: Fold movcond with true and false values identical
tcg: Improve support for cmpsel_vec
- 1 -
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2024-09-11
Richard Henderson
New
[v2,06/18] tcg/s390x: Do not expand cmp_vec early
tcg: Improve support for cmpsel_vec
- - -
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2024-09-11
Richard Henderson
New
[v2,05/18] tcg/ppc: Do not expand cmp_vec early
tcg: Improve support for cmpsel_vec
- - -
-
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2024-09-11
Richard Henderson
New
[v2,04/18] tcg/i386: Do not expand cmpsel_vec early
tcg: Improve support for cmpsel_vec
- - -
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2024-09-11
Richard Henderson
New
[v2,03/18] tcg/i386: Do not expand cmp_vec early
tcg: Improve support for cmpsel_vec
- - -
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2024-09-11
Richard Henderson
New
[v2,02/18] tcg/i386: Split out tcg_out_vex_modrm_type
tcg: Improve support for cmpsel_vec
- 1 -
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2024-09-11
Richard Henderson
New
[v2,01/18] tcg: Export vec_gen_6
tcg: Improve support for cmpsel_vec
- 1 -
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2024-09-11
Richard Henderson
New
[v3,5/5] license: Update deprecated SPDX tag GPL-2.0 to GPL-2.0-only
license: Fix typos and update SPDX tags
- 2 -
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2024-09-11
Philippe Mathieu-Daudé
New
[v3,4/5] license: Update deprecated SPDX tag GPL-2.0+ to GPL-2.0-or-later
license: Fix typos and update SPDX tags
- 2 -
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2024-09-11
Philippe Mathieu-Daudé
New
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