Show patches with: Submitter = Jim Shu       |    State = Action Required       |    Archived = No       |   43 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
[v2,18/18] hw/riscv: virt: Add WorldGuard support Implements RISC-V WorldGuard extension v0.4 - - - --- 2025-04-17 Jim Shu New
[v2,17/18] hw/misc: riscv_wgchecker: Check the slot settings in translate Implements RISC-V WorldGuard extension v0.4 - - - --- 2025-04-17 Jim Shu New
[v2,16/18] hw/misc: riscv_wgchecker: Implement correct block-access behavior Implements RISC-V WorldGuard extension v0.4 - - - --- 2025-04-17 Jim Shu New
[v2,15/18] hw/misc: riscv_wgchecker: Implement wgchecker slot registers Implements RISC-V WorldGuard extension v0.4 - - - --- 2025-04-17 Jim Shu New
[v2,14/18] hw/misc: riscv_wgchecker: Implement RISC-V WorldGuard Checker Implements RISC-V WorldGuard extension v0.4 - - - --- 2025-04-17 Jim Shu New
[v2,13/18] hw/misc: riscv_worldguard: Add API to enable WG extension of CPU Implements RISC-V WorldGuard extension v0.4 - - - --- 2025-04-17 Jim Shu New
[v2,12/18] target/riscv: Expose CPU options of WorldGuard Implements RISC-V WorldGuard extension v0.4 - - - --- 2025-04-17 Jim Shu New
[v2,11/18] target/riscv: Add WID to MemTxAttrs of CPU memory transactions Implements RISC-V WorldGuard extension v0.4 - - - --- 2025-04-17 Jim Shu New
[v2,10/18] target/riscv: Implement WorldGuard CSRs Implements RISC-V WorldGuard extension v0.4 - - - --- 2025-04-17 Jim Shu New
[v2,09/18] target/riscv: Allow global WG config to set WG CPU callbacks Implements RISC-V WorldGuard extension v0.4 - - - --- 2025-04-17 Jim Shu New
[v2,08/18] target/riscv: Add defines for WorldGuard CSRs Implements RISC-V WorldGuard extension v0.4 - - - --- 2025-04-17 Jim Shu New
[v2,07/18] target/riscv: Add hard-coded CPU state of WG extension Implements RISC-V WorldGuard extension v0.4 - - - --- 2025-04-17 Jim Shu New
[v2,06/18] target/riscv: Add CPU options of WorldGuard CPU extension Implements RISC-V WorldGuard extension v0.4 - - - --- 2025-04-17 Jim Shu New
[v2,05/18] hw/misc: riscv_worldguard: Add RISC-V WorldGuard global config Implements RISC-V WorldGuard extension v0.4 - - - --- 2025-04-17 Jim Shu New
[v2,04/18] exec: Add RISC-V WorldGuard WID to MemTxAttrs Implements RISC-V WorldGuard extension v0.4 - - - --- 2025-04-17 Jim Shu New
[v2,03/18] accel/tcg: memory access from CPU will pass access_type to IOMMU Implements RISC-V WorldGuard extension v0.4 - - - --- 2025-04-17 Jim Shu New
[v2,02/18] system/physmem: Remove the assertion of page-aligned section number Implements RISC-V WorldGuard extension v0.4 - - - --- 2025-04-17 Jim Shu New
[v2,01/18] accel/tcg: Store section pointer in CPUTLBEntryFull Implements RISC-V WorldGuard extension v0.4 - - - --- 2025-04-17 Jim Shu New
[17/17] hw/riscv: virt: Add WorldGuard support Implements RISC-V WorldGuard extension v0.4 - - - --- 2025-04-15 Jim Shu New
[16/17] hw/misc: riscv_wgchecker: Check the slot settings in translate Implements RISC-V WorldGuard extension v0.4 - - - --- 2025-04-15 Jim Shu New
[15/17] hw/misc: riscv_wgchecker: Implement correct block-access behavior Implements RISC-V WorldGuard extension v0.4 - - - --- 2025-04-15 Jim Shu New
[14/17] hw/misc: riscv_wgchecker: Implement wgchecker slot registers Implements RISC-V WorldGuard extension v0.4 - - - --- 2025-04-15 Jim Shu New
[13/17] hw/misc: riscv_wgchecker: Implement RISC-V WorldGuard Checker Implements RISC-V WorldGuard extension v0.4 - - - --- 2025-04-15 Jim Shu New
[12/17] hw/misc: riscv_worldguard: Add API to enable WG extension of CPU Implements RISC-V WorldGuard extension v0.4 - - - --- 2025-04-15 Jim Shu New
[11/17] target/riscv: Expose CPU options of WorldGuard Implements RISC-V WorldGuard extension v0.4 - - - --- 2025-04-15 Jim Shu New
[10/17] target/riscv: Add WID to MemTxAttrs of CPU memory transactions Implements RISC-V WorldGuard extension v0.4 - - - --- 2025-04-15 Jim Shu New
[09/17] target/riscv: Implement WorldGuard CSRs Implements RISC-V WorldGuard extension v0.4 - - - --- 2025-04-15 Jim Shu New
[08/17] target/riscv: Allow global WG config to set WG CPU callbacks Implements RISC-V WorldGuard extension v0.4 - - - --- 2025-04-15 Jim Shu New
[07/17] target/riscv: Add defines for WorldGuard CSRs Implements RISC-V WorldGuard extension v0.4 - - - --- 2025-04-15 Jim Shu New
[06/17] target/riscv: Add hard-coded CPU state of WG extension Implements RISC-V WorldGuard extension v0.4 - - - --- 2025-04-15 Jim Shu New
[05/17] target/riscv: Add CPU options of WorldGuard CPU extension Implements RISC-V WorldGuard extension v0.4 - - - --- 2025-04-15 Jim Shu New
[04/17] hw/misc: riscv_worldguard: Add RISC-V WorldGuard global config Implements RISC-V WorldGuard extension v0.4 - - - --- 2025-04-15 Jim Shu New
[03/17] exec: Add RISC-V WorldGuard WID to MemTxAttrs Implements RISC-V WorldGuard extension v0.4 - - - --- 2025-04-15 Jim Shu New
[02/17] accel/tcg: memory access from CPU will pass access_type to IOMMU Implements RISC-V WorldGuard extension v0.4 - - - --- 2025-04-15 Jim Shu New
[01/17] accel/tcg: Store section pointer in CPUTLBEntryFull Implements RISC-V WorldGuard extension v0.4 - - - --- 2025-04-15 Jim Shu New
[v2,4/4] target/riscv: Enable/Disable S/VS-mode Timer when STCE bit is changed Several sstc extension fixes - - - --- 2025-04-09 Jim Shu New
[v2,3/4] target/riscv: Fix VSTIP bit in sstc extension. Several sstc extension fixes 1 - - --- 2025-04-09 Jim Shu New
[v2,2/4] hw/intc: riscv_aclint: Fix mtime write for sstc extension Several sstc extension fixes - - - --- 2025-04-09 Jim Shu New
[v2,1/4] target/riscv: Add the checking into stimecmp write function. Several sstc extension fixes 1 - - --- 2025-04-09 Jim Shu New
[4/4] target/riscv: Enable/Disable S/VS-mode Timer when STCE bit is changed Several sstc extension fixes - - - --- 2025-03-19 Jim Shu New
[3/4] target/riscv: Fix VSTIP bit in sstc extension. Several sstc extension fixes 1 - - --- 2025-03-19 Jim Shu New
[2/4] hw/intc: riscv_aclint: Fix mtime write for sstc extension Several sstc extension fixes - - - --- 2025-03-19 Jim Shu New
[1/4] target/riscv: Add the checking into stimecmp write function. Several sstc extension fixes 1 - - --- 2025-03-19 Jim Shu New