Show patches with: Series = Support UXL filed in xstatus.       |   13 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
[13/13] target/riscv: Enable uxl field write Support UXL filed in xstatus. - - - --- 2021-11-01 LIU Zhiwei New
[12/13] target/riscv: Don't save pc when exception return Support UXL filed in xstatus. - 1 - --- 2021-11-01 LIU Zhiwei New
[11/13] target/riscv: Switch context in exception return Support UXL filed in xstatus. - - - --- 2021-11-01 LIU Zhiwei New
[10/13] target/riscv: Adjust scalar reg in vector with ol Support UXL filed in xstatus. - - - --- 2021-11-01 LIU Zhiwei New
[09/13] target/riscv: Adjust vector address with ol Support UXL filed in xstatus. - - - --- 2021-11-01 LIU Zhiwei New
[08/13] target/riscv: Fix check range for first fault only Support UXL filed in xstatus. - 1 - --- 2021-11-01 LIU Zhiwei New
[07/13] target/riscv: Ajdust vector atomic check with ol Support UXL filed in xstatus. - - - --- 2021-11-01 LIU Zhiwei New
[06/13] target/riscv: Adjust vsetvl according to ol Support UXL filed in xstatus. - - - --- 2021-11-01 LIU Zhiwei New
[05/13] target/riscv: Calculate address according to ol Support UXL filed in xstatus. - - - --- 2021-11-01 LIU Zhiwei New
[04/13] target/riscv: Use gdb xml according to max mxlen Support UXL filed in xstatus. - 1 - --- 2021-11-01 LIU Zhiwei New
[03/13] target/riscv: Ignore the pc bits above XLEN Support UXL filed in xstatus. - 1 - --- 2021-11-01 LIU Zhiwei New
[02/13] target/riscv: Extend pc for runtime pc write Support UXL filed in xstatus. - - - --- 2021-11-01 LIU Zhiwei New
[01/13] target/riscv: Sign extend pc for different ol Support UXL filed in xstatus. - - - --- 2021-11-01 LIU Zhiwei New