Show patches with: Series = support vector extension v1.0       |    State = Action Required       |   77 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
[v10,77/77] target/riscv: rvv-1.0: Add ELEN checks for widening and narrowing instructions support vector extension v1.0 1 - - --- 2021-11-29 Frank Chang New
[v10,76/77] target/riscv: rvv-1.0: update opivv_vadc_check() comment support vector extension v1.0 - 1 - --- 2021-11-29 Frank Chang New
[v10,75/77] target/riscv: rvv-1.0: rename vmandnot.mm and vmornot.mm to vmandn.mm and vmorn.mm support vector extension v1.0 - 1 - --- 2021-11-29 Frank Chang New
[v10,74/77] target/riscv: rvv-1.0: add vector unit-stride mask load/store insns support vector extension v1.0 1 - - --- 2021-11-29 Frank Chang New
[v10,73/77] target/riscv: rvv-1.0: add evl parameter to vext_ldst_us() support vector extension v1.0 - 1 - --- 2021-11-29 Frank Chang New
[v10,72/77] target/riscv: rvv-1.0: add vsetivli instruction support vector extension v1.0 - 1 - --- 2021-11-29 Frank Chang New
[v10,71/77] target/riscv: rvv-1.0: rename r2_zimm to r2_zimm11 support vector extension v1.0 - 1 - --- 2021-11-29 Frank Chang New
[v10,70/77] target/riscv: rvv-1.0: floating-point reciprocal estimate instruction support vector extension v1.0 1 - - --- 2021-11-29 Frank Chang New
[v10,69/77] target/riscv: rvv-1.0: floating-point reciprocal square-root estimate instruction support vector extension v1.0 1 - - --- 2021-11-29 Frank Chang New
[v10,68/77] target/riscv: gdb: support vector registers for rv64 & rv32 support vector extension v1.0 1 - - --- 2021-11-29 Frank Chang New
[v10,67/77] target/riscv: rvv-1.0: trigger illegal instruction exception if frm is not valid support vector extension v1.0 1 - - --- 2021-11-29 Frank Chang New
[v10,66/77] target/riscv: rvv-1.0: implement vstart CSR support vector extension v1.0 - 1 - --- 2021-11-29 Frank Chang New
[v10,65/77] target/riscv: rvv-1.0: relax RV_VLEN_MAX to 1024-bits support vector extension v1.0 - 1 - --- 2021-11-29 Frank Chang New
[v10,64/77] target/riscv: rvv-1.0: narrowing floating-point/integer type-convert support vector extension v1.0 1 - - --- 2021-11-29 Frank Chang New
[v10,63/77] target/riscv: add "set round to odd" rounding mode helper function support vector extension v1.0 1 - - --- 2021-11-29 Frank Chang New
[v10,62/77] target/riscv: rvv-1.0: widening floating-point/integer type-convert support vector extension v1.0 1 - - --- 2021-11-29 Frank Chang New
[v10,61/77] target/riscv: rvv-1.0: floating-point/integer type-convert instructions support vector extension v1.0 - 1 - --- 2021-11-29 Frank Chang New
[v10,60/77] target/riscv: introduce floating-point rounding mode enum support vector extension v1.0 - 1 - --- 2021-11-29 Frank Chang New
[v10,59/77] target/riscv: rvv-1.0: floating-point min/max instructions support vector extension v1.0 - 1 - --- 2021-11-29 Frank Chang New
[v10,58/77] target/riscv: rvv-1.0: remove integer extract instruction support vector extension v1.0 - 1 - --- 2021-11-29 Frank Chang New
[v10,57/77] target/riscv: rvv-1.0: remove vmford.vv and vmford.vf support vector extension v1.0 - 1 - --- 2021-11-29 Frank Chang New
[v10,56/77] target/riscv: rvv-1.0: remove widening saturating scaled multiply-add support vector extension v1.0 - 1 - --- 2021-11-29 Frank Chang New
[v10,55/77] target/riscv: rvv-1.0: single-width scaling shift instructions support vector extension v1.0 - 1 - --- 2021-11-29 Frank Chang New
[v10,54/77] target/riscv: rvv-1.0: widening floating-point reduction instructions support vector extension v1.0 - 1 - --- 2021-11-29 Frank Chang New
[v10,53/77] target/riscv: rvv-1.0: single-width floating-point reduction support vector extension v1.0 - 1 - --- 2021-11-29 Frank Chang New
[v10,52/77] target/riscv: rvv-1.0: narrowing fixed-point clip instructions support vector extension v1.0 - 1 - --- 2021-11-29 Frank Chang New
[v10,51/77] target/riscv: rvv-1.0: floating-point slide instructions support vector extension v1.0 - 1 - --- 2021-11-29 Frank Chang New
[v10,50/77] target/riscv: rvv-1.0: slide instructions support vector extension v1.0 - 1 - --- 2021-11-29 Frank Chang New
[v10,49/77] target/riscv: rvv-1.0: mask-register logical instructions support vector extension v1.0 - 1 - --- 2021-11-29 Frank Chang New
[v10,48/77] target/riscv: rvv-1.0: floating-point compare instructions support vector extension v1.0 - 1 - --- 2021-11-29 Frank Chang New
[v10,47/77] target/riscv: rvv-1.0: integer comparison instructions support vector extension v1.0 - 1 - --- 2021-11-29 Frank Chang New
[v10,46/77] target/riscv: rvv-1.0: single-width saturating add and subtract instructions support vector extension v1.0 - 1 - --- 2021-11-29 Frank Chang New
[v10,45/77] target/riscv: rvv-1.0: widening integer multiply-add instructions support vector extension v1.0 - 1 - --- 2021-11-29 Frank Chang New
[v10,44/77] target/riscv: rvv-1.0: narrowing integer right shift instructions support vector extension v1.0 - 1 - --- 2021-11-29 Frank Chang New
[v10,43/77] target/riscv: rvv-1.0: integer add-with-carry/subtract-with-borrow support vector extension v1.0 - 1 - --- 2021-11-29 Frank Chang New
[v10,42/77] target/riscv: rvv-1.0: single-width bit shift instructions support vector extension v1.0 - 1 - --- 2021-11-29 Frank Chang New
[v10,41/77] target/riscv: rvv-1.0: single-width averaging add and subtract instructions support vector extension v1.0 - 1 - --- 2021-11-29 Frank Chang New
[v10,40/77] target/riscv: rvv-1.0: integer extension instructions support vector extension v1.0 - 1 - --- 2021-11-29 Frank Chang New
[v10,39/77] target/riscv: rvv-1.0: whole register move instructions support vector extension v1.0 1 - - --- 2021-11-29 Frank Chang New
[v10,38/77] target/riscv: rvv-1.0: floating-point scalar move instructions support vector extension v1.0 1 - - --- 2021-11-29 Frank Chang New
[v10,37/77] target/riscv: rvv-1.0: floating-point move instruction support vector extension v1.0 - 1 - --- 2021-11-29 Frank Chang New
[v10,36/77] target/riscv: rvv-1.0: integer scalar move instructions support vector extension v1.0 1 1 - --- 2021-11-29 Frank Chang New
[v10,35/77] target/riscv: rvv-1.0: register gather instructions support vector extension v1.0 - 1 - --- 2021-11-29 Frank Chang New
[v10,34/77] target/riscv: rvv-1.0: allow load element with sign-extended support vector extension v1.0 - 2 - --- 2021-11-29 Frank Chang New
[v10,33/77] target/riscv: rvv-1.0: element index instruction support vector extension v1.0 - 2 - --- 2021-11-29 Frank Chang New
[v10,32/77] target/riscv: rvv-1.0: iota instruction support vector extension v1.0 - 2 - --- 2021-11-29 Frank Chang New
[v10,31/77] target/riscv: rvv-1.0: set-X-first mask bit instructions support vector extension v1.0 - 2 - --- 2021-11-29 Frank Chang New
[v10,30/77] target/riscv: rvv-1.0: find-first-set mask bit instruction support vector extension v1.0 - 2 - --- 2021-11-29 Frank Chang New
[v10,29/77] target/riscv: rvv-1.0: count population in mask instruction support vector extension v1.0 - 2 - --- 2021-11-29 Frank Chang New
[v10,28/77] target/riscv: rvv-1.0: floating-point classify instructions support vector extension v1.0 - 2 - --- 2021-11-29 Frank Chang New
[v10,27/77] target/riscv: rvv-1.0: floating-point square-root instruction support vector extension v1.0 - 2 - --- 2021-11-29 Frank Chang New
[v10,26/77] target/riscv: rvv-1.0: take fractional LMUL into vector max elements calculation support vector extension v1.0 - 2 - --- 2021-11-29 Frank Chang New
[v10,25/77] target/riscv: rvv-1.0: update vext_max_elems() for load/store insns support vector extension v1.0 - 1 - --- 2021-11-29 Frank Chang New
[v10,24/77] target/riscv: rvv-1.0: load/store whole register instructions support vector extension v1.0 - 1 - --- 2021-11-29 Frank Chang New
[v10,23/77] target/riscv: rvv-1.0: fault-only-first unit stride load support vector extension v1.0 - 2 - --- 2021-11-29 Frank Chang New
[v10,22/77] target/riscv: rvv-1.0: fix address index overflow bug of indexed load/store insns support vector extension v1.0 - 2 - --- 2021-11-29 Frank Chang New
[v10,21/77] target/riscv: rvv-1.0: index load and store instructions support vector extension v1.0 - 1 - --- 2021-11-29 Frank Chang New
[v10,20/77] target/riscv: rvv-1.0: stride load and store instructions support vector extension v1.0 - 1 - --- 2021-11-29 Frank Chang New
[v10,19/77] target/riscv: rvv-1.0: configure instructions support vector extension v1.0 - 2 - --- 2021-11-29 Frank Chang New
[v10,18/77] target/riscv: rvv-1.0: remove amo operations instructions support vector extension v1.0 - 1 - --- 2021-11-29 Frank Chang New
[v10,17/77] target/riscv: rvv:1.0: add translation-time nan-box helper function support vector extension v1.0 - 2 - --- 2021-11-29 Frank Chang New
[v10,16/77] target/riscv: introduce more imm value modes in translator functions support vector extension v1.0 - 2 - --- 2021-11-29 Frank Chang New
[v10,15/77] target/riscv: rvv-1.0: update check functions support vector extension v1.0 - 1 - --- 2021-11-29 Frank Chang New
[v10,14/77] target/riscv: rvv-1.0: add VMA and VTA support vector extension v1.0 - 2 - --- 2021-11-29 Frank Chang New
[v10,13/77] target/riscv: rvv-1.0: add fractional LMUL support vector extension v1.0 - 2 - --- 2021-11-29 Frank Chang New
[v10,12/77] target/riscv: rvv-1.0: remove MLEN calculations support vector extension v1.0 - 2 - --- 2021-11-29 Frank Chang New
[v10,11/77] target/riscv: rvv-1.0: check MSTATUS_VS when accessing vector csr registers support vector extension v1.0 - 2 - --- 2021-11-29 Frank Chang New
[v10,10/77] target/riscv: rvv-1.0: add vlenb register support vector extension v1.0 - 2 - --- 2021-11-29 Frank Chang New
[v10,09/77] target/riscv: rvv-1.0: add vcsr register support vector extension v1.0 - 2 - --- 2021-11-29 Frank Chang New
[v10,08/77] target/riscv: rvv-1.0: remove rvv related codes from fcsr registers support vector extension v1.0 - 2 - --- 2021-11-29 Frank Chang New
[v10,07/77] target/riscv: rvv-1.0: add translation-time vector context status support vector extension v1.0 - 2 - --- 2021-11-29 Frank Chang New
[v10,06/77] target/riscv: rvv-1.0: introduce writable misa.v field support vector extension v1.0 - 2 - --- 2021-11-29 Frank Chang New
[v10,05/77] target/riscv: rvv-1.0: add sstatus VS field support vector extension v1.0 - 2 - --- 2021-11-29 Frank Chang New
[v10,04/77] target/riscv: rvv-1.0: set mstatus.SD bit if mstatus.VS is dirty support vector extension v1.0 - 2 - --- 2021-11-29 Frank Chang New
[v10,03/77] target/riscv: rvv-1.0: add mstatus VS field support vector extension v1.0 - 2 - --- 2021-11-29 Frank Chang New
[v10,02/77] target/riscv: Use FIELD_EX32() to extract wd field support vector extension v1.0 - 2 - --- 2021-11-29 Frank Chang New
[v10,01/77] target/riscv: drop vector 0.7.1 and add 1.0 support support vector extension v1.0 - 3 - --- 2021-11-29 Frank Chang New