Show patches with: Submitter = Michael Rolnik       |    State = Action Required       |   503 patches
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Patch Series A/R/T S/W/F Date Submitter Delegate State
[01/10] target-avr: AVR cores support is added. 1. basic CPU structure 2. registers 3. no instructi… - - - --- 2016-06-02 Michael Rolnik New
[01/10] target-avr: AVR cores support is added. 1. basic CPU structure 2. registers 3. no instructi… - - - --- 2016-06-02 Michael Rolnik New
[02/10] target-avr: adding AVR CPU features/flavors - - - --- 2016-06-02 Michael Rolnik New
[02/10] target-avr: adding AVR CPU features/flavors - - - --- 2016-06-02 Michael Rolnik New
[03/10] target-avr: adding a sample AVR board - - - --- 2016-06-02 Michael Rolnik New
[03/10] target-avr: adding a sample AVR board - - - --- 2016-06-02 Michael Rolnik New
[04/10] target-avr: adding instructions encodings - - - --- 2016-06-02 Michael Rolnik New
[04/10] target-avr: adding instructions encodings - - - --- 2016-06-02 Michael Rolnik New
[05/10] target-avr: adding AVR interrupt handling - - - --- 2016-06-02 Michael Rolnik New
[05/10] target-avr: adding AVR interrupt handling - - - --- 2016-06-02 Michael Rolnik New
[06/10] target-avr: adding helpers for IN, OUT, SLEEP, WBR & unsupported instructions - - - --- 2016-06-02 Michael Rolnik New
[06/10] target-avr: adding helpers for IN, OUT, SLEEP, WBR & unsupported instructions - - - --- 2016-06-02 Michael Rolnik New
[07/10] target-avr: adding instruction decoder - - - --- 2016-06-02 Michael Rolnik New
[07/10] target-avr: adding instruction decoder - - - --- 2016-06-02 Michael Rolnik New
[08/10] target-avr: adding instruction translation - - - --- 2016-06-02 Michael Rolnik New
[08/10] target-avr: adding instruction translation - - - --- 2016-06-02 Michael Rolnik New
[09/10] target-avr: updating translate.c to use instructions translation - - - --- 2016-06-02 Michael Rolnik New
[09/10] target-avr: updating translate.c to use instructions translation - - - --- 2016-06-02 Michael Rolnik New
[1/1] Set TARGET_PAGE_BITS to be 10 instead of 8 bits Set AVR TARGET_PAGE_BITS to be 10 instead of 8 - - - --- 2021-03-20 Michael Rolnik New
[1/9] AVR cores support is added. 1. basic CPU structure 2. registers 3. no instructions - - - --- 2016-05-30 Michael Rolnik New
[1/9] target-avr: AVR cores support is added. 1. basic CPU structure 2. registers 3. no instructions - - - --- 2016-06-03 Michael Rolnik New
[10/10] target-avr: fixing code style - - - --- 2016-06-02 Michael Rolnik New
[10/10] target-avr: fixing code style - - - --- 2016-06-02 Michael Rolnik New
[2/9] adding AVR CPU features/flavors - - - --- 2016-05-30 Michael Rolnik New
[2/9] target-avr: adding AVR CPU features/flavors - - - --- 2016-06-03 Michael Rolnik New
[3/9] adding a sample AVR board - - - --- 2016-05-30 Michael Rolnik New
[3/9] target-avr: adding a sample AVR board - - - --- 2016-06-03 Michael Rolnik New
[4/9] adding instructions encodings for LE and BE compilers. - - - --- 2016-05-30 Michael Rolnik New
[4/9] target-avr: adding instructions encodings - - - --- 2016-06-03 Michael Rolnik New
[5/9] adding AVR interrupt handling - - - --- 2016-05-30 Michael Rolnik New
[5/9] target-avr: adding AVR interrupt handling - - - --- 2016-06-03 Michael Rolnik New
[6/9] adding helpers for IN, OUT, SLEEP, WBR & unsupported instructions - - - --- 2016-05-30 Michael Rolnik New
[6/9] target-avr: adding helpers for IN, OUT, SLEEP, WBR & unsupported instructions - - - --- 2016-06-03 Michael Rolnik New
[7/9] adding instruction decoder - - - --- 2016-05-30 Michael Rolnik New
[7/9] target-avr: adding instruction decoder - - - --- 2016-06-03 Michael Rolnik New
[8/9] adding instruction translations - - - --- 2016-05-30 Michael Rolnik New
[8/9] target-avr: adding instruction translation - - - --- 2016-06-03 Michael Rolnik New
[9/9] target-avr: updating translate.c to use instructions translation - - - --- 2016-06-03 Michael Rolnik New
[9/9] updating gen_intermediate_code function to use prevously added decoder and translator - - - --- 2016-05-30 Michael Rolnik New
[for,4.2,v28,1/8] target/avr: Add outward facing interfaces and core CPU logic QEMU AVR 8 bit cores 1 - - --- 2019-08-05 Michael Rolnik New
[for,4.2,v28,2/8] target/avr: Add instruction helpers QEMU AVR 8 bit cores - - - --- 2019-08-05 Michael Rolnik New
[for,4.2,v28,3/8] target/avr: Add instruction decoding QEMU AVR 8 bit cores - - - --- 2019-08-05 Michael Rolnik New
[for,4.2,v28,4/8] target/avr: Add instruction translation QEMU AVR 8 bit cores - - - --- 2019-08-05 Michael Rolnik New
[for,4.2,v28,5/8] target/avr: Add limited support for USART and 16 bit timer peripherals QEMU AVR 8 bit cores - - - --- 2019-08-05 Michael Rolnik New
[for,4.2,v28,6/8] target/avr: Add example board configuration QEMU AVR 8 bit cores - - - --- 2019-08-05 Michael Rolnik New
[for,4.2,v28,7/8] target/avr: Register AVR support with the rest of QEMU, the build system, and the… QEMU AVR 8 bit cores - - - --- 2019-08-05 Michael Rolnik New
[for,4.2,v28,8/8] target/avr: Add tests QEMU AVR 8 bit cores - 1 1 --- 2019-08-05 Michael Rolnik New
[RFC,1/1] Implement AVR watchdog timer Implement AVR WDT (watchdog timer) - - - --- 2021-05-05 Michael Rolnik New
[RFC,1/1] Implement AVR watchdog timer Implement AVR WDT (watchdog timer) - - - --- 2021-05-02 Michael Rolnik New
[RFC,v1,01/29] target-arc: initial commit - - - --- 2016-09-08 Michael Rolnik New
[RFC,v1,02/29] target-arc: ADC, ADD, ADD1, ADD2, ADD3 - - - --- 2016-09-08 Michael Rolnik New
[RFC,v1,03/29] target-arc: SUB, SUB1, SUB2, SUB3, SBC, RSUB, CMP - - - --- 2016-09-08 Michael Rolnik New
[RFC,v1,04/29] target-arc: AND, OR, XOR, BIC, TST - - - --- 2016-09-08 Michael Rolnik New
[RFC,v1,05/29] target-arc: ASL(m), ASR(m), LSR(m), ROR(m) - - - --- 2016-09-08 Michael Rolnik New
[RFC,v1,06/29] target-arc: EX, LD, ST, SYNC, PREFETCH - - - --- 2016-09-08 Michael Rolnik New
[RFC,v1,07/29] target-arc: MAX, MIN - - - --- 2016-09-08 Michael Rolnik New
[RFC,v1,08/29] target-arc: MOV, EXT, SEX, SWAP - - - --- 2016-09-08 Michael Rolnik New
[RFC,v1,09/29] target-arc: NEG, ABS, NOT - - - --- 2016-09-08 Michael Rolnik New
[RFC,v1,10/29] target-arc: POP, PUSH - - - --- 2016-09-08 Michael Rolnik New
[RFC,v1,11/29] target-arc: BCLR, BMSK, BSET, BTST, BXOR - - - --- 2016-09-08 Michael Rolnik New
[RFC,v1,12/29] target-arc: RLC, RRC - - - --- 2016-09-08 Michael Rolnik New
[RFC,v1,13/29] target-arc: NORM, NORMW - - - --- 2016-09-08 Michael Rolnik New
[RFC,v1,14/29] target-arc: MPY, MPYH, MPYHU, MPYU - - - --- 2016-09-08 Michael Rolnik New
[RFC,v1,15/29] target-arc: MUL64, MULU64, DIVAW - - - --- 2016-09-08 Michael Rolnik New
[RFC,v1,16/29] target-arc: BBIT0, BBIT1, BR - - - --- 2016-09-08 Michael Rolnik New
[RFC,v1,17/29] target-arc: B, BL - - - --- 2016-09-08 Michael Rolnik New
[RFC,v1,18/29] target-arc: J, JL - - - --- 2016-09-08 Michael Rolnik New
[RFC,v1,19/29] target-arc: LR, SR - - - --- 2016-09-08 Michael Rolnik New
[RFC,v1,20/29] target-arc: ADDS, ADDSDW, SUBS, SUBSDW - - - --- 2016-09-08 Michael Rolnik New
[RFC,v1,21/29] target-arc: ABSS, ABSSW, NEGS, NEGSW, RND16, SAT16 - - - --- 2016-09-08 Michael Rolnik New
[RFC,v1,22/29] target-arc: ASLS, ASRS - - - --- 2016-09-08 Michael Rolnik New
[RFC,v1,23/29] target-arc: FLAG, BRK, SLEEP - - - --- 2016-09-08 Michael Rolnik New
[RFC,v1,24/29] target-arc: NOP, UNIMP - - - --- 2016-09-08 Michael Rolnik New
[RFC,v1,25/29] target-arc: TRAP, SWI - - - --- 2016-09-08 Michael Rolnik New
[RFC,v1,26/29] target-arc: RTIE - - - --- 2016-09-08 Michael Rolnik New
[RFC,v1,27/29] target-arc: LP - - - --- 2016-09-08 Michael Rolnik New
[RFC,v1,28/29] target-arc: decode - - - --- 2016-09-08 Michael Rolnik New
[RFC,v1,29/29] target-arc: sample board - - - --- 2016-09-08 Michael Rolnik New
[RFC,v19,01/13] target-avr: AVR cores support is added. - - - --- 2017-06-08 Michael Rolnik New
[RFC,v19,02/13] target-avr: adding AVR CPU features/flavors - - - --- 2017-06-08 Michael Rolnik New
[RFC,v19,03/13] target-avr: adding a sample AVR board - - - --- 2017-06-08 Michael Rolnik New
[RFC,v19,04/13] target-avr: adding instructions encodings - - - --- 2017-06-08 Michael Rolnik New
[RFC,v19,05/13] target-avr: adding AVR interrupt handling - - - --- 2017-06-08 Michael Rolnik New
[RFC,v19,06/13] target-avr: adding helpers for IN, OUT, SLEEP, WBR & unsupported instructions - - - --- 2017-06-08 Michael Rolnik New
[RFC,v19,07/13] target-avr: adding instruction translation - - - --- 2017-06-08 Michael Rolnik New
[RFC,v19,08/13] target-avr: instruction decoder generator - - - --- 2017-06-08 Michael Rolnik New
[RFC,v19,09/13] target-avr: adding instruction decoder - - - --- 2017-06-08 Michael Rolnik New
[RFC,v19,10/13] target-avr: Put env pointer in DisasContext - - - --- 2017-06-08 Michael Rolnik New
[RFC,v19,11/13] target-avr: Put all translation code into one compilation unit - - - --- 2017-06-08 Michael Rolnik New
[RFC,v19,12/13] target-avr: Respect .inc.c convention - - - --- 2017-06-08 Michael Rolnik New
[RFC,v19,13/13] target-avr: Merge translate-inst.inc.c into translate.c - - - --- 2017-06-08 Michael Rolnik New
[RFC,v20,1/8] target/avr: Add outward facing interfaces and core CPU logic QEMU AVR 8 bit cores - - - --- 2019-05-30 Michael Rolnik New
[RFC,v20,2/8] target/avr: Add instruction helpers QEMU AVR 8 bit cores - 1 - --- 2019-05-30 Michael Rolnik New
[RFC,v20,3/8] target/avr: Add mechanism to check for active debugger connection QEMU AVR 8 bit cores - - - --- 2019-05-30 Michael Rolnik New
[RFC,v20,4/8] target-avr: Add instruction decoding QEMU AVR 8 bit cores - - - --- 2019-05-30 Michael Rolnik New
[RFC,v20,5/8] target/avr: Add instruction translation QEMU AVR 8 bit cores - - - --- 2019-05-30 Michael Rolnik New
[RFC,v20,6/8] target/avr: Add limited support for USART and 16 bit timer peripherals QEMU AVR 8 bit cores - - - --- 2019-05-30 Michael Rolnik New
[RFC,v20,7/8] target/avr: Add example board configuration QEMU AVR 8 bit cores - - - --- 2019-05-30 Michael Rolnik New
[RFC,v20,8/8] target/avr: Register AVR support with the rest of QEMU, the build system, and the MAI… QEMU AVR 8 bit cores - - - --- 2019-05-30 Michael Rolnik New
[RFC,v3,1/1] Implement AVR watchdog timer Implement AVR WDT (watchdog timer) - - - --- 2021-05-15 Michael Rolnik New
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