| Message ID | 1494309644-18743-3-git-send-email-peterx@redhat.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 05/09/2017 03:00 AM, Peter Xu wrote: > Meanwhile, abstract a function to detect msix masked bit. > > Signed-off-by: Peter Xu <peterx@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> > --- > hw/pci/msix.c | 11 +++++++++-- > hw/pci/trace-events | 3 +++ > 2 files changed, 12 insertions(+), 2 deletions(-) > > diff --git a/hw/pci/msix.c b/hw/pci/msix.c > index bb54e8b..fc5fe51 100644 > --- a/hw/pci/msix.c > +++ b/hw/pci/msix.c > @@ -22,6 +22,7 @@ > #include "hw/xen/xen.h" > #include "qemu/range.h" > #include "qapi/error.h" > +#include "trace.h" > > #define MSIX_CAP_LENGTH 12 > > @@ -130,10 +131,14 @@ static void msix_handle_mask_update(PCIDevice *dev, int vector, bool was_masked) > } > } > > +static bool msix_masked(PCIDevice *dev) > +{ > + return dev->config[dev->msix_cap + MSIX_CONTROL_OFFSET] & MSIX_MASKALL_MASK; > +} > + > static void msix_update_function_masked(PCIDevice *dev) > { > - dev->msix_function_masked = !msix_enabled(dev) || > - (dev->config[dev->msix_cap + MSIX_CONTROL_OFFSET] & MSIX_MASKALL_MASK); > + dev->msix_function_masked = !msix_enabled(dev) || msix_masked(dev); > } > > /* Handle MSI-X capability config write. */ > @@ -148,6 +153,8 @@ void msix_write_config(PCIDevice *dev, uint32_t addr, > return; > } > > + trace_msix_write_config(dev->name, msix_enabled(dev), msix_masked(dev)); > + > was_masked = dev->msix_function_masked; > msix_update_function_masked(dev); > > diff --git a/hw/pci/trace-events b/hw/pci/trace-events > index 2b9cf24..83c8f5a 100644 > --- a/hw/pci/trace-events > +++ b/hw/pci/trace-events > @@ -7,3 +7,6 @@ pci_update_mappings_add(void *d, uint32_t bus, uint32_t slot, uint32_t func, int > # hw/pci/pci_host.c > pci_cfg_read(const char *dev, unsigned devid, unsigned fnid, unsigned offs, unsigned val) "%s %02u:%u @0x%x -> 0x%x" > pci_cfg_write(const char *dev, unsigned devid, unsigned fnid, unsigned offs, unsigned val) "%s %02u:%u @0x%x <- 0x%x" > + > +# hw/pci/msix.c > +msix_write_config(char *name, bool enabled, bool masked) "dev %s enabled %d masked %d" >
On Tue, May 09, 2017 at 02:00:43PM +0800, Peter Xu wrote: > Meanwhile, abstract a function to detect msix masked bit. > > Signed-off-by: Peter Xu <peterx@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> > --- > hw/pci/msix.c | 11 +++++++++-- > hw/pci/trace-events | 3 +++ > 2 files changed, 12 insertions(+), 2 deletions(-) > > diff --git a/hw/pci/msix.c b/hw/pci/msix.c > index bb54e8b..fc5fe51 100644 > --- a/hw/pci/msix.c > +++ b/hw/pci/msix.c > @@ -22,6 +22,7 @@ > #include "hw/xen/xen.h" > #include "qemu/range.h" > #include "qapi/error.h" > +#include "trace.h" > > #define MSIX_CAP_LENGTH 12 > > @@ -130,10 +131,14 @@ static void msix_handle_mask_update(PCIDevice *dev, int vector, bool was_masked) > } > } > > +static bool msix_masked(PCIDevice *dev) > +{ > + return dev->config[dev->msix_cap + MSIX_CONTROL_OFFSET] & MSIX_MASKALL_MASK; > +} > + > static void msix_update_function_masked(PCIDevice *dev) > { > - dev->msix_function_masked = !msix_enabled(dev) || > - (dev->config[dev->msix_cap + MSIX_CONTROL_OFFSET] & MSIX_MASKALL_MASK); > + dev->msix_function_masked = !msix_enabled(dev) || msix_masked(dev); > } > > /* Handle MSI-X capability config write. */ > @@ -148,6 +153,8 @@ void msix_write_config(PCIDevice *dev, uint32_t addr, > return; > } > > + trace_msix_write_config(dev->name, msix_enabled(dev), msix_masked(dev)); > + > was_masked = dev->msix_function_masked; > msix_update_function_masked(dev); > > diff --git a/hw/pci/trace-events b/hw/pci/trace-events > index 2b9cf24..83c8f5a 100644 > --- a/hw/pci/trace-events > +++ b/hw/pci/trace-events > @@ -7,3 +7,6 @@ pci_update_mappings_add(void *d, uint32_t bus, uint32_t slot, uint32_t func, int > # hw/pci/pci_host.c > pci_cfg_read(const char *dev, unsigned devid, unsigned fnid, unsigned offs, unsigned val) "%s %02u:%u @0x%x -> 0x%x" > pci_cfg_write(const char *dev, unsigned devid, unsigned fnid, unsigned offs, unsigned val) "%s %02u:%u @0x%x <- 0x%x" > + > +# hw/pci/msix.c > +msix_write_config(char *name, bool enabled, bool masked) "dev %s enabled %d masked %d" > -- > 2.7.4
On Tue, May 09, 2017 at 02:00:43PM +0800, Peter Xu wrote: > Meanwhile, abstract a function to detect msix masked bit. > > Signed-off-by: Peter Xu <peterx@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> > --- > hw/pci/msix.c | 11 +++++++++-- > hw/pci/trace-events | 3 +++ > 2 files changed, 12 insertions(+), 2 deletions(-) > > diff --git a/hw/pci/msix.c b/hw/pci/msix.c > index bb54e8b..fc5fe51 100644 > --- a/hw/pci/msix.c > +++ b/hw/pci/msix.c > @@ -22,6 +22,7 @@ > #include "hw/xen/xen.h" > #include "qemu/range.h" > #include "qapi/error.h" > +#include "trace.h" > > #define MSIX_CAP_LENGTH 12 > > @@ -130,10 +131,14 @@ static void msix_handle_mask_update(PCIDevice *dev, int vector, bool was_masked) > } > } > > +static bool msix_masked(PCIDevice *dev) > +{ > + return dev->config[dev->msix_cap + MSIX_CONTROL_OFFSET] & MSIX_MASKALL_MASK; > +} > + > static void msix_update_function_masked(PCIDevice *dev) > { > - dev->msix_function_masked = !msix_enabled(dev) || > - (dev->config[dev->msix_cap + MSIX_CONTROL_OFFSET] & MSIX_MASKALL_MASK); > + dev->msix_function_masked = !msix_enabled(dev) || msix_masked(dev); > } > > /* Handle MSI-X capability config write. */ > @@ -148,6 +153,8 @@ void msix_write_config(PCIDevice *dev, uint32_t addr, > return; > } > > + trace_msix_write_config(dev->name, msix_enabled(dev), msix_masked(dev)); > + > was_masked = dev->msix_function_masked; > msix_update_function_masked(dev); > > diff --git a/hw/pci/trace-events b/hw/pci/trace-events > index 2b9cf24..83c8f5a 100644 > --- a/hw/pci/trace-events > +++ b/hw/pci/trace-events > @@ -7,3 +7,6 @@ pci_update_mappings_add(void *d, uint32_t bus, uint32_t slot, uint32_t func, int > # hw/pci/pci_host.c > pci_cfg_read(const char *dev, unsigned devid, unsigned fnid, unsigned offs, unsigned val) "%s %02u:%u @0x%x -> 0x%x" > pci_cfg_write(const char *dev, unsigned devid, unsigned fnid, unsigned offs, unsigned val) "%s %02u:%u @0x%x <- 0x%x" > + > +# hw/pci/msix.c > +msix_write_config(char *name, bool enabled, bool masked) "dev %s enabled %d masked %d" > -- > 2.7.4
diff --git a/hw/pci/msix.c b/hw/pci/msix.c index bb54e8b..fc5fe51 100644 --- a/hw/pci/msix.c +++ b/hw/pci/msix.c @@ -22,6 +22,7 @@ #include "hw/xen/xen.h" #include "qemu/range.h" #include "qapi/error.h" +#include "trace.h" #define MSIX_CAP_LENGTH 12 @@ -130,10 +131,14 @@ static void msix_handle_mask_update(PCIDevice *dev, int vector, bool was_masked) } } +static bool msix_masked(PCIDevice *dev) +{ + return dev->config[dev->msix_cap + MSIX_CONTROL_OFFSET] & MSIX_MASKALL_MASK; +} + static void msix_update_function_masked(PCIDevice *dev) { - dev->msix_function_masked = !msix_enabled(dev) || - (dev->config[dev->msix_cap + MSIX_CONTROL_OFFSET] & MSIX_MASKALL_MASK); + dev->msix_function_masked = !msix_enabled(dev) || msix_masked(dev); } /* Handle MSI-X capability config write. */ @@ -148,6 +153,8 @@ void msix_write_config(PCIDevice *dev, uint32_t addr, return; } + trace_msix_write_config(dev->name, msix_enabled(dev), msix_masked(dev)); + was_masked = dev->msix_function_masked; msix_update_function_masked(dev); diff --git a/hw/pci/trace-events b/hw/pci/trace-events index 2b9cf24..83c8f5a 100644 --- a/hw/pci/trace-events +++ b/hw/pci/trace-events @@ -7,3 +7,6 @@ pci_update_mappings_add(void *d, uint32_t bus, uint32_t slot, uint32_t func, int # hw/pci/pci_host.c pci_cfg_read(const char *dev, unsigned devid, unsigned fnid, unsigned offs, unsigned val) "%s %02u:%u @0x%x -> 0x%x" pci_cfg_write(const char *dev, unsigned devid, unsigned fnid, unsigned offs, unsigned val) "%s %02u:%u @0x%x <- 0x%x" + +# hw/pci/msix.c +msix_write_config(char *name, bool enabled, bool masked) "dev %s enabled %d masked %d"
Meanwhile, abstract a function to detect msix masked bit. Signed-off-by: Peter Xu <peterx@redhat.com> --- hw/pci/msix.c | 11 +++++++++-- hw/pci/trace-events | 3 +++ 2 files changed, 12 insertions(+), 2 deletions(-)