@@ -2312,7 +2312,7 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev,
if (!cpu_slot) {
MachineState *ms = MACHINE(pcms);
- x86_topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids);
+ pcms->topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids);
error_setg(errp,
"Invalid CPU [socket: %u, die: %u, core: %u, thread: %u] with"
" APIC ID %" PRIu32 ", valid index range 0:%d",
@@ -2333,7 +2333,7 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev,
/* TODO: move socket_id/core_id/thread_id checks into x86_cpu_realizefn()
* once -smp refactoring is complete and there will be CPU private
* CPUState::nr_cores and CPUState::nr_threads fields instead of globals */
- x86_topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids);
+ pcms->topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids);
if (cpu->socket_id != -1 && cpu->socket_id != topo_ids.pkg_id) {
error_setg(errp, "property socket-id: %u doesn't match set apic-id:"
" 0x%x (socket-id: %u)", cpu->socket_id, cpu->apic_id, topo_ids.pkg_id);
@@ -2681,6 +2681,7 @@ static void pc_machine_initfn(Object *obj)
/* Initialize the apic id related handlers */
pcms->apicid_from_cpu_idx = x86_apicid_from_cpu_idx;
+ pcms->topo_ids_from_apicid = x86_topo_ids_from_apicid;
pc_system_flash_create(pcms);
}
@@ -2730,8 +2731,8 @@ static int64_t pc_get_default_cpu_node_id(const MachineState *ms, int idx)
initialize_topo_info(&topo_info, pcms, ms);
assert(idx < ms->possible_cpus->len);
- x86_topo_ids_from_apicid(ms->possible_cpus->cpus[idx].arch_id,
- &topo_info, &topo_ids);
+ pcms->topo_ids_from_apicid(ms->possible_cpus->cpus[idx].arch_id,
+ &topo_info, &topo_ids);
return topo_ids.pkg_id % ms->numa_state->num_nodes;
}
@@ -2763,8 +2764,8 @@ static const CPUArchIdList *pc_possible_cpu_arch_ids(MachineState *ms)
ms->possible_cpus->cpus[i].type = ms->cpu_type;
ms->possible_cpus->cpus[i].vcpus_count = 1;
ms->possible_cpus->cpus[i].arch_id = x86_cpu_apic_id_from_index(pcms, i);
- x86_topo_ids_from_apicid(ms->possible_cpus->cpus[i].arch_id,
- &topo_info, &topo_ids);
+ pcms->topo_ids_from_apicid(ms->possible_cpus->cpus[i].arch_id,
+ &topo_info, &topo_ids);
ms->possible_cpus->cpus[i].props.has_socket_id = true;
ms->possible_cpus->cpus[i].props.socket_id = topo_ids.pkg_id;
if (pcms->smp_dies > 1) {
@@ -71,6 +71,8 @@ struct PCMachineState {
/* Apic id specific handlers */
uint32_t (*apicid_from_cpu_idx)(X86CPUTopoInfo *topo_info,
unsigned cpu_index);
+ void (*topo_ids_from_apicid)(apic_id_t apicid, X86CPUTopoInfo *topo_info,
+ X86CPUTopoIDs *topo_ids);
/* Address space used by IOAPIC device. All IOAPIC interrupts
* will be translated to MSI messages in the address space. */
Add function pointer topo_ids_from_apicid in PCMachineState. Initialize with correct handler based on mode selected. x86_apicid_from_cpu_idx will be the default handler. Signed-off-by: Babu Moger <babu.moger@amd.com> --- hw/i386/pc.c | 13 +++++++------ include/hw/i386/pc.h | 2 ++ 2 files changed, 9 insertions(+), 6 deletions(-)