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[2/5] target-mips: remove old & unuseful comments

Message ID 20170304185652.10675-3-f4bug@amsat.org (mailing list archive)
State New, archived
Headers show

Commit Message

Philippe Mathieu-Daudé March 4, 2017, 6:56 p.m. UTC 
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/mips/translate.c | 4 ----
 1 file changed, 4 deletions(-)

Comments

Yongbok Kim March 13, 2017, 3 p.m. UTC | #1 
On 04/03/2017 18:56, Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
>  target/mips/translate.c | 4 ----
>  1 file changed, 4 deletions(-)
> 
> diff --git a/target/mips/translate.c b/target/mips/translate.c
> index 8b4a072ecb..1fe0ff39f2 100644
> --- a/target/mips/translate.c
> +++ b/target/mips/translate.c
> @@ -5137,7 +5137,6 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
>  //            gen_helper_mfc0_contextconfig(arg); /* SmartMIPS ASE */
>              rn = "ContextConfig";
>              goto cp0_unimplemented;
> -//            break;
>          case 2:
>              CP0_CHECK(ctx->ulri);
>              tcg_gen_ld32s_tl(arg, cpu_env,
> @@ -5791,7 +5790,6 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
>  //            gen_helper_mtc0_contextconfig(cpu_env, arg); /* SmartMIPS ASE */
>              rn = "ContextConfig";
>              goto cp0_unimplemented;
> -//            break;
>          case 2:
>              CP0_CHECK(ctx->ulri);
>              tcg_gen_st_tl(arg, cpu_env,
> @@ -6454,7 +6452,6 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
>  //            gen_helper_dmfc0_contextconfig(arg); /* SmartMIPS ASE */
>              rn = "ContextConfig";
>              goto cp0_unimplemented;
> -//            break;
>          case 2:
>              CP0_CHECK(ctx->ulri);
>              tcg_gen_ld_tl(arg, cpu_env,
> @@ -7092,7 +7089,6 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
>  //           gen_helper_mtc0_contextconfig(cpu_env, arg); /* SmartMIPS ASE */
>              rn = "ContextConfig";
>              goto cp0_unimplemented;
> -//           break;
>          case 2:
>              CP0_CHECK(ctx->ulri);
>              tcg_gen_st_tl(arg, cpu_env,
> 

Reviewed-by: Yongbok Kim <yongbok.kim@imgtec.com>
diff mbox

Patch

diff --git a/target/mips/translate.c b/target/mips/translate.c
index 8b4a072ecb..1fe0ff39f2 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -5137,7 +5137,6 @@  static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
 //            gen_helper_mfc0_contextconfig(arg); /* SmartMIPS ASE */
             rn = "ContextConfig";
             goto cp0_unimplemented;
-//            break;
         case 2:
             CP0_CHECK(ctx->ulri);
             tcg_gen_ld32s_tl(arg, cpu_env,
@@ -5791,7 +5790,6 @@  static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
 //            gen_helper_mtc0_contextconfig(cpu_env, arg); /* SmartMIPS ASE */
             rn = "ContextConfig";
             goto cp0_unimplemented;
-//            break;
         case 2:
             CP0_CHECK(ctx->ulri);
             tcg_gen_st_tl(arg, cpu_env,
@@ -6454,7 +6452,6 @@  static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
 //            gen_helper_dmfc0_contextconfig(arg); /* SmartMIPS ASE */
             rn = "ContextConfig";
             goto cp0_unimplemented;
-//            break;
         case 2:
             CP0_CHECK(ctx->ulri);
             tcg_gen_ld_tl(arg, cpu_env,
@@ -7092,7 +7089,6 @@  static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
 //           gen_helper_mtc0_contextconfig(cpu_env, arg); /* SmartMIPS ASE */
             rn = "ContextConfig";
             goto cp0_unimplemented;
-//           break;
         case 2:
             CP0_CHECK(ctx->ulri);
             tcg_gen_st_tl(arg, cpu_env,