diff mbox

[2/2] target/arm: Don't set INSN_ARM_BE32 for CONFIG_USER_ONLY

Message ID 20171019212109.11341-3-richard.henderson@linaro.org (mailing list archive)
State New, archived
Headers show

Commit Message

Richard Henderson Oct. 19, 2017, 9:21 p.m. UTC
This matches translator behaviour in arm_lduw_code.

Fixes: https://bugs.launchpad.net/qemu/+bug/1724485
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/cpu.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

Comments

Philippe Mathieu-Daudé Oct. 20, 2017, 3:38 a.m. UTC | #1
On 10/19/2017 06:21 PM, Richard Henderson wrote:
> This matches translator behaviour in arm_lduw_code.
> 
> Fixes: https://bugs.launchpad.net/qemu/+bug/1724485
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

> ---
>  target/arm/cpu.c | 9 +++++++--
>  1 file changed, 7 insertions(+), 2 deletions(-)
> 
> diff --git a/target/arm/cpu.c b/target/arm/cpu.c
> index bc9d70df04..a0ed11c9a5 100644
> --- a/target/arm/cpu.c
> +++ b/target/arm/cpu.c
> @@ -478,6 +478,7 @@ static void arm_disas_set_info(CPUState *cpu, disassemble_info *info)
>  {
>      ARMCPU *ac = ARM_CPU(cpu);
>      CPUARMState *env = &ac->env;
> +    bool sctlr_b;
>  
>      if (is_a64(env)) {
>          /* We might not be compiled with the A64 disassembler
> @@ -506,7 +507,9 @@ static void arm_disas_set_info(CPUState *cpu, disassemble_info *info)
>          info->cap_arch = CS_ARCH_ARM;
>          info->cap_mode = cap_mode;
>      }
> -    if (bswap_code(arm_sctlr_b(env))) {
> +
> +    sctlr_b = arm_sctlr_b(env);
> +    if (bswap_code(sctlr_b)) {
>  #ifdef TARGET_WORDS_BIGENDIAN
>          info->endian = BFD_ENDIAN_LITTLE;
>  #else
> @@ -514,9 +517,11 @@ static void arm_disas_set_info(CPUState *cpu, disassemble_info *info)
>  #endif
>      }
>      info->flags &= ~INSN_ARM_BE32;
> -    if (arm_sctlr_b(env)) {
> +#ifndef CONFIG_USER_ONLY
> +    if (sctlr_b) {
>          info->flags |= INSN_ARM_BE32;
>      }
> +#endif
>  }
>  
>  uint64_t arm_cpu_mp_affinity(int idx, uint8_t clustersz)
>
diff mbox

Patch

diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index bc9d70df04..a0ed11c9a5 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -478,6 +478,7 @@  static void arm_disas_set_info(CPUState *cpu, disassemble_info *info)
 {
     ARMCPU *ac = ARM_CPU(cpu);
     CPUARMState *env = &ac->env;
+    bool sctlr_b;
 
     if (is_a64(env)) {
         /* We might not be compiled with the A64 disassembler
@@ -506,7 +507,9 @@  static void arm_disas_set_info(CPUState *cpu, disassemble_info *info)
         info->cap_arch = CS_ARCH_ARM;
         info->cap_mode = cap_mode;
     }
-    if (bswap_code(arm_sctlr_b(env))) {
+
+    sctlr_b = arm_sctlr_b(env);
+    if (bswap_code(sctlr_b)) {
 #ifdef TARGET_WORDS_BIGENDIAN
         info->endian = BFD_ENDIAN_LITTLE;
 #else
@@ -514,9 +517,11 @@  static void arm_disas_set_info(CPUState *cpu, disassemble_info *info)
 #endif
     }
     info->flags &= ~INSN_ARM_BE32;
-    if (arm_sctlr_b(env)) {
+#ifndef CONFIG_USER_ONLY
+    if (sctlr_b) {
         info->flags |= INSN_ARM_BE32;
     }
+#endif
 }
 
 uint64_t arm_cpu_mp_affinity(int idx, uint8_t clustersz)