diff mbox series

[v2,17/23] target/arm: Fix coding style issues

Message ID 20190615154352.26824-18-philmd@redhat.com (mailing list archive)
State New, archived
Headers show
Series Support disabling TCG on ARM | expand

Commit Message

Philippe Mathieu-Daudé June 15, 2019, 3:43 p.m. UTC 
Since we'll move this code around, fix its style first.

Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
 target/arm/translate.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

Comments

Alex Bennée June 17, 2019, 2:20 p.m. UTC | #1 
Philippe Mathieu-Daudé <philmd@redhat.com> writes:

> Since we'll move this code around, fix its style first.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

> ---
>  target/arm/translate.c | 11 ++++++-----
>  1 file changed, 6 insertions(+), 5 deletions(-)
>
> diff --git a/target/arm/translate.c b/target/arm/translate.c
> index c274c8b460..d0ab3e27e6 100644
> --- a/target/arm/translate.c
> +++ b/target/arm/translate.c
> @@ -9179,7 +9179,7 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn)
>                  loaded_base = 0;
>                  loaded_var = NULL;
>                  n = 0;
> -                for(i=0;i<16;i++) {
> +                for (i = 0; i < 16; i++) {
>                      if (insn & (1 << i))
>                          n++;
>                  }
> @@ -9202,7 +9202,7 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn)
>                      }
>                  }
>                  j = 0;
> -                for(i=0;i<16;i++) {
> +                for (i = 0; i < 16; i++) {
>                      if (insn & (1 << i)) {
>                          if (is_load) {
>                              /* load */
> @@ -12427,12 +12427,13 @@ void arm_cpu_dump_state(CPUState *cs, FILE *f, int flags)
>          return;
>      }
>
> -    for(i=0;i<16;i++) {
> +    for (i = 0; i < 16; i++) {
>          qemu_fprintf(f, "R%02d=%08x", i, env->regs[i]);
> -        if ((i % 4) == 3)
> +        if ((i % 4) == 3) {
>              qemu_fprintf(f, "\n");
> -        else
> +        } else {
>              qemu_fprintf(f, " ");
> +        }
>      }
>
>      if (arm_feature(env, ARM_FEATURE_M)) {


--
Alex Bennée
diff mbox series

Patch

diff --git a/target/arm/translate.c b/target/arm/translate.c
index c274c8b460..d0ab3e27e6 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -9179,7 +9179,7 @@  static void disas_arm_insn(DisasContext *s, unsigned int insn)
                 loaded_base = 0;
                 loaded_var = NULL;
                 n = 0;
-                for(i=0;i<16;i++) {
+                for (i = 0; i < 16; i++) {
                     if (insn & (1 << i))
                         n++;
                 }
@@ -9202,7 +9202,7 @@  static void disas_arm_insn(DisasContext *s, unsigned int insn)
                     }
                 }
                 j = 0;
-                for(i=0;i<16;i++) {
+                for (i = 0; i < 16; i++) {
                     if (insn & (1 << i)) {
                         if (is_load) {
                             /* load */
@@ -12427,12 +12427,13 @@  void arm_cpu_dump_state(CPUState *cs, FILE *f, int flags)
         return;
     }
 
-    for(i=0;i<16;i++) {
+    for (i = 0; i < 16; i++) {
         qemu_fprintf(f, "R%02d=%08x", i, env->regs[i]);
-        if ((i % 4) == 3)
+        if ((i % 4) == 3) {
             qemu_fprintf(f, "\n");
-        else
+        } else {
             qemu_fprintf(f, " ");
+        }
     }
 
     if (arm_feature(env, ARM_FEATURE_M)) {