| Message ID | 20190615154352.26824-23-philmd@redhat.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Support disabling TCG on ARM | expand |
Philippe Mathieu-Daudé <philmd@redhat.com> writes: > Per Peter Maydell: > > semihosting hooks either SVC or HLT instructions, and inside KVM > both of those go to EL1, ie to the guest, and can't be trapped to > KVM. > > Let check_for_semihosting() return False when not running on TCG. > > Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> > --- > target/arm/helper.c | 8 +++++++- > 1 file changed, 7 insertions(+), 1 deletion(-) > > diff --git a/target/arm/helper.c b/target/arm/helper.c > index 8b7ce0561b..a3843a5508 100644 > --- a/target/arm/helper.c > +++ b/target/arm/helper.c > @@ -20,7 +20,6 @@ > #include "qemu/crc32c.h" > #include "qemu/qemu-print.h" > #include "exec/exec-all.h" > -#include "arm_ldst.h" > #include <zlib.h> /* For crc32 */ > #include "hw/semihosting/semihost.h" > #include "sysemu/cpus.h" > @@ -30,6 +29,9 @@ > #include "qapi/qapi-commands-target.h" > #include "qapi/error.h" > #include "qemu/guest-random.h" > +#ifdef CONFIG_TCG > +#include "arm_ldst.h" > +#endif > > #define ARM_CPU_FREQ 1000000000 /* FIXME: 1 GHz, should be configurable */ > > @@ -8270,6 +8272,7 @@ static void arm_cpu_do_interrupt_aarch64(CPUState *cs) > > static inline bool check_for_semihosting(CPUState *cs) > { > +#ifdef CONFIG_TCG > /* Check whether this exception is a semihosting call; if so > * then handle it and return true; otherwise return false. > */ > @@ -8345,6 +8348,9 @@ static inline bool check_for_semihosting(CPUState *cs) > env->regs[0] = do_arm_semihosting(env); > return true; > } > +#else > + return false; > +#endif > } > > /* Handle a CPU exception for A and R profile CPUs. -- Alex Bennée
diff --git a/target/arm/helper.c b/target/arm/helper.c index 8b7ce0561b..a3843a5508 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -20,7 +20,6 @@ #include "qemu/crc32c.h" #include "qemu/qemu-print.h" #include "exec/exec-all.h" -#include "arm_ldst.h" #include <zlib.h> /* For crc32 */ #include "hw/semihosting/semihost.h" #include "sysemu/cpus.h" @@ -30,6 +29,9 @@ #include "qapi/qapi-commands-target.h" #include "qapi/error.h" #include "qemu/guest-random.h" +#ifdef CONFIG_TCG +#include "arm_ldst.h" +#endif #define ARM_CPU_FREQ 1000000000 /* FIXME: 1 GHz, should be configurable */ @@ -8270,6 +8272,7 @@ static void arm_cpu_do_interrupt_aarch64(CPUState *cs) static inline bool check_for_semihosting(CPUState *cs) { +#ifdef CONFIG_TCG /* Check whether this exception is a semihosting call; if so * then handle it and return true; otherwise return false. */ @@ -8345,6 +8348,9 @@ static inline bool check_for_semihosting(CPUState *cs) env->regs[0] = do_arm_semihosting(env); return true; } +#else + return false; +#endif } /* Handle a CPU exception for A and R profile CPUs.
Per Peter Maydell: semihosting hooks either SVC or HLT instructions, and inside KVM both of those go to EL1, ie to the guest, and can't be trapped to KVM. Let check_for_semihosting() return False when not running on TCG. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> --- target/arm/helper.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-)