diff mbox series

tcg/mips: mips sync* encode error

Message ID 20200411124612.12560-1-precinct@mail.ustc.edu.cn (mailing list archive)
State New, archived
Headers show
Series tcg/mips: mips sync* encode error | expand

Commit Message

lixinyu April 11, 2020, 12:46 p.m. UTC
OPC_SYNC_WMB, OPC_SYNC_MB, OPC_SYNC_ACQUIRE, OPC_SYNC_RELEASE and
OPC_SYNC_RMB have wrong encode. According to the mips manual,
their encode should be 'OPC_SYNC | 0x?? << 6' rather than
'OPC_SYNC | 0x?? << 5'. Wrong encode can lead illegal instruction
errors. These instructions often appear with multi-threaded
simulation.

Signed-off-by: lixinyu <precinct@mail.ustc.edu.cn>
---
 tcg/mips/tcg-target.inc.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

Comments

Richard Henderson April 11, 2020, 6:07 p.m. UTC | #1
On 4/11/20 5:46 AM, lixinyu wrote:
> OPC_SYNC_WMB, OPC_SYNC_MB, OPC_SYNC_ACQUIRE, OPC_SYNC_RELEASE and
> OPC_SYNC_RMB have wrong encode. According to the mips manual,
> their encode should be 'OPC_SYNC | 0x?? << 6' rather than
> 'OPC_SYNC | 0x?? << 5'. Wrong encode can lead illegal instruction
> errors. These instructions often appear with multi-threaded
> simulation.

Good catch.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

Queued to tcg-for-5.0.


r~
Aleksandar Markovic April 11, 2020, 6:37 p.m. UTC | #2
20:08 Sub, 11.04.2020. Richard Henderson <richard.henderson@linaro.org> је
написао/ла:
>
> On 4/11/20 5:46 AM, lixinyu wrote:
> > OPC_SYNC_WMB, OPC_SYNC_MB, OPC_SYNC_ACQUIRE, OPC_SYNC_RELEASE and
> > OPC_SYNC_RMB have wrong encode. According to the mips manual,
> > their encode should be 'OPC_SYNC | 0x?? << 6' rather than
> > 'OPC_SYNC | 0x?? << 5'. Wrong encode can lead illegal instruction
> > errors. These instructions often appear with multi-threaded
> > simulation.
>
> Good catch.
>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
>
> Queued to tcg-for-5.0.
>

Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>

Thanks to Lixinyu, in the first place, for reporting the problem, and also
thanks to Richard for reviewing and incorporating this patch into his queue
for 5.0. I also think, as Richard does, that this should go into 5.0, even
in this final stages.

Happy Easter, or hapy and sunny weekend, whatever you choose.

Aleksandar

>
> r~
>
Philippe Mathieu-Daudé April 12, 2020, 5:25 p.m. UTC | #3
On 4/11/20 2:46 PM, lixinyu wrote:
> OPC_SYNC_WMB, OPC_SYNC_MB, OPC_SYNC_ACQUIRE, OPC_SYNC_RELEASE and
> OPC_SYNC_RMB have wrong encode. According to the mips manual,
> their encode should be 'OPC_SYNC | 0x?? << 6' rather than
> 'OPC_SYNC | 0x?? << 5'. Wrong encode can lead illegal instruction
> errors. These instructions often appear with multi-threaded
> simulation.
> 

Fixes: 6f0b99104a3

> Signed-off-by: lixinyu <precinct@mail.ustc.edu.cn>

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

> ---
>  tcg/mips/tcg-target.inc.c | 10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c
> index 1da663ce84..4d32ebc1df 100644
> --- a/tcg/mips/tcg-target.inc.c
> +++ b/tcg/mips/tcg-target.inc.c
> @@ -404,11 +404,11 @@ typedef enum {
>  
>      /* MIPS r6 introduced names for weaker variants of SYNC.  These are
>         backward compatible to previous architecture revisions.  */
> -    OPC_SYNC_WMB     = OPC_SYNC | 0x04 << 5,
> -    OPC_SYNC_MB      = OPC_SYNC | 0x10 << 5,
> -    OPC_SYNC_ACQUIRE = OPC_SYNC | 0x11 << 5,
> -    OPC_SYNC_RELEASE = OPC_SYNC | 0x12 << 5,
> -    OPC_SYNC_RMB     = OPC_SYNC | 0x13 << 5,
> +    OPC_SYNC_WMB     = OPC_SYNC | 0x04 << 6,
> +    OPC_SYNC_MB      = OPC_SYNC | 0x10 << 6,
> +    OPC_SYNC_ACQUIRE = OPC_SYNC | 0x11 << 6,
> +    OPC_SYNC_RELEASE = OPC_SYNC | 0x12 << 6,
> +    OPC_SYNC_RMB     = OPC_SYNC | 0x13 << 6,
>  
>      /* Aliases for convenience.  */
>      ALIAS_PADD     = sizeof(void *) == 4 ? OPC_ADDU : OPC_DADDU,
>
diff mbox series

Patch

diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c
index 1da663ce84..4d32ebc1df 100644
--- a/tcg/mips/tcg-target.inc.c
+++ b/tcg/mips/tcg-target.inc.c
@@ -404,11 +404,11 @@  typedef enum {
 
     /* MIPS r6 introduced names for weaker variants of SYNC.  These are
        backward compatible to previous architecture revisions.  */
-    OPC_SYNC_WMB     = OPC_SYNC | 0x04 << 5,
-    OPC_SYNC_MB      = OPC_SYNC | 0x10 << 5,
-    OPC_SYNC_ACQUIRE = OPC_SYNC | 0x11 << 5,
-    OPC_SYNC_RELEASE = OPC_SYNC | 0x12 << 5,
-    OPC_SYNC_RMB     = OPC_SYNC | 0x13 << 5,
+    OPC_SYNC_WMB     = OPC_SYNC | 0x04 << 6,
+    OPC_SYNC_MB      = OPC_SYNC | 0x10 << 6,
+    OPC_SYNC_ACQUIRE = OPC_SYNC | 0x11 << 6,
+    OPC_SYNC_RELEASE = OPC_SYNC | 0x12 << 6,
+    OPC_SYNC_RMB     = OPC_SYNC | 0x13 << 6,
 
     /* Aliases for convenience.  */
     ALIAS_PADD     = sizeof(void *) == 4 ? OPC_ADDU : OPC_DADDU,