diff mbox series

[PULL,06/27] target/mips/meson: Introduce mips_tcg source set

Message ID 20210313194829.2193621-7-f4bug@amsat.org (mailing list archive)
State New, archived
Headers show
Series [PULL,01/27] hw/mips/gt64xxx: Initialize ISD I/O memory region in DeviceRealize() | expand

Commit Message

Philippe Mathieu-Daudé March 13, 2021, 7:48 p.m. UTC 
Introduce the 'mips_tcg' source set to collect TCG specific files.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/mips/meson.build | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)
diff mbox series

Patch

diff --git a/target/mips/meson.build b/target/mips/meson.build
index 9741545440c..75c16524606 100644
--- a/target/mips/meson.build
+++ b/target/mips/meson.build
@@ -6,12 +6,13 @@ 
 ]
 
 mips_ss = ss.source_set()
-mips_ss.add(gen)
 mips_ss.add(files(
   'cpu.c',
   'gdbstub.c',
 ))
-mips_ss.add(when: 'CONFIG_TCG', if_true: files(
+mips_tcg_ss = ss.source_set()
+mips_tcg_ss.add(gen)
+mips_tcg_ss.add(files(
   'dsp_helper.c',
   'fpu_helper.c',
   'lmmi_helper.c',
@@ -36,5 +37,7 @@ 
   'cp0_helper.c',
 ))
 
+mips_ss.add_all(when: 'CONFIG_TCG', if_true: [mips_tcg_ss])
+
 target_arch += {'mips': mips_ss}
 target_softmmu_arch += {'mips': mips_softmmu_ss}