| Message ID | 20210415182353.8173-1-peter.maydell@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [for-6.0?] hw/arm/armsse: Give SSE-300 its own Property array | expand |
On Thu, 15 Apr 2021 at 19:23, Peter Maydell <peter.maydell@linaro.org> wrote: > > SSE-300 currently shares the SSE-200 Property array. This is > bad principally because the default values of the CPU0_FPU > and CPU0_DSP properties disable the FPU and DSP on the CPU. > That is correct for the SSE-300 but not the SSE-200. Should read "correct for the SSE-200 but not the SSE-300", of course. > Give the SSE-300 its own Property array with the correct > SSE-300 specific settings: > * SSE-300 has only one CPU, so no CPU1* properties > * SSE-300 CPU has FPU and DSP > > Buglink: https://bugs.launchpad.net/qemu/+bug/1923861 > Signed-off-by: Peter Maydell <peter.maydell@linaro.org> > --- -- PMM
On 4/15/21 8:23 PM, Peter Maydell wrote: > SSE-300 currently shares the SSE-200 Property array. This is > bad principally because the default values of the CPU0_FPU > and CPU0_DSP properties disable the FPU and DSP on the CPU. > That is correct for the SSE-300 but not the SSE-200. > Give the SSE-300 its own Property array with the correct > SSE-300 specific settings: > * SSE-300 has only one CPU, so no CPU1* properties > * SSE-300 CPU has FPU and DSP > > Buglink: https://bugs.launchpad.net/qemu/+bug/1923861 > Signed-off-by: Peter Maydell <peter.maydell@linaro.org> > --- > This is a simple and pretty safe fix, but I don't think it quite > merits doing an rc4 by itself. I think if we do an rc4 for some > other reason it ought to go in, though. Sounds good. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
On 4/15/21 11:23 AM, Peter Maydell wrote: > SSE-300 currently shares the SSE-200 Property array. This is > bad principally because the default values of the CPU0_FPU > and CPU0_DSP properties disable the FPU and DSP on the CPU. > That is correct for the SSE-300 but not the SSE-200. > Give the SSE-300 its own Property array with the correct > SSE-300 specific settings: > * SSE-300 has only one CPU, so no CPU1* properties > * SSE-300 CPU has FPU and DSP > > Buglink:https://bugs.launchpad.net/qemu/+bug/1923861 > Signed-off-by: Peter Maydell<peter.maydell@linaro.org> > --- > This is a simple and pretty safe fix, but I don't think it quite > merits doing an rc4 by itself. I think if we do an rc4 for some > other reason it ought to go in, though. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c index e5aeb9e485f..170dea8632d 100644 --- a/hw/arm/armsse.c +++ b/hw/arm/armsse.c @@ -84,7 +84,7 @@ static Property iotkit_properties[] = { DEFINE_PROP_END_OF_LIST() }; -static Property armsse_properties[] = { +static Property sse200_properties[] = { DEFINE_PROP_LINK("memory", ARMSSE, board_memory, TYPE_MEMORY_REGION, MemoryRegion *), DEFINE_PROP_UINT32("EXP_NUMIRQ", ARMSSE, exp_numirq, 64), @@ -97,6 +97,17 @@ static Property armsse_properties[] = { DEFINE_PROP_END_OF_LIST() }; +static Property sse300_properties[] = { + DEFINE_PROP_LINK("memory", ARMSSE, board_memory, TYPE_MEMORY_REGION, + MemoryRegion *), + DEFINE_PROP_UINT32("EXP_NUMIRQ", ARMSSE, exp_numirq, 64), + DEFINE_PROP_UINT32("SRAM_ADDR_WIDTH", ARMSSE, sram_addr_width, 15), + DEFINE_PROP_UINT32("init-svtor", ARMSSE, init_svtor, 0x10000000), + DEFINE_PROP_BOOL("CPU0_FPU", ARMSSE, cpu_fpu[0], true), + DEFINE_PROP_BOOL("CPU0_DSP", ARMSSE, cpu_dsp[0], true), + DEFINE_PROP_END_OF_LIST() +}; + static const ARMSSEDeviceInfo iotkit_devices[] = { { .name = "timer0", @@ -519,7 +530,7 @@ static const ARMSSEInfo armsse_variants[] = { .has_cpuid = true, .has_cpu_pwrctrl = false, .has_sse_counter = false, - .props = armsse_properties, + .props = sse200_properties, .devinfo = sse200_devices, .irq_is_common = sse200_irq_is_common, }, @@ -537,7 +548,7 @@ static const ARMSSEInfo armsse_variants[] = { .has_cpuid = true, .has_cpu_pwrctrl = true, .has_sse_counter = true, - .props = armsse_properties, + .props = sse300_properties, .devinfo = sse300_devices, .irq_is_common = sse300_irq_is_common, },
SSE-300 currently shares the SSE-200 Property array. This is bad principally because the default values of the CPU0_FPU and CPU0_DSP properties disable the FPU and DSP on the CPU. That is correct for the SSE-300 but not the SSE-200. Give the SSE-300 its own Property array with the correct SSE-300 specific settings: * SSE-300 has only one CPU, so no CPU1* properties * SSE-300 CPU has FPU and DSP Buglink: https://bugs.launchpad.net/qemu/+bug/1923861 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- This is a simple and pretty safe fix, but I don't think it quite merits doing an rc4 by itself. I think if we do an rc4 for some other reason it ought to go in, though. hw/arm/armsse.c | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-)