Message ID | 20210512185441.3619828-4-matheus.ferst@eldorado.org.br (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Base for adding PowerPC 64-bit instructions | expand |
On Wed, May 12, 2021 at 03:54:13PM -0300, matheus.ferst@eldorado.org.br wrote: > From: Richard Henderson <richard.henderson@linaro.org> > > There are other valid settings for is_jmp besides > DISAS_NEXT and DISAS_NORETURN, so eliminating that > dichotomy from ppc_tr_translate_insn is helpful. > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > Reviewed-by: Luis Pires <luis.pires@eldorado.org.br> > Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Applied to ppc-for-6.1, thanks. > --- > target/ppc/translate.c | 26 ++++++++++++++++++-------- > 1 file changed, 18 insertions(+), 8 deletions(-) > > diff --git a/target/ppc/translate.c b/target/ppc/translate.c > index 3ad4c7163d..616ffc1508 100644 > --- a/target/ppc/translate.c > +++ b/target/ppc/translate.c > @@ -261,7 +261,8 @@ static void gen_exception_err(DisasContext *ctx, uint32_t excp, uint32_t error) > gen_helper_raise_exception_err(cpu_env, t0, t1); > tcg_temp_free_i32(t0); > tcg_temp_free_i32(t1); > - ctx->exception = (excp); > + ctx->exception = excp; > + ctx->base.is_jmp = DISAS_NORETURN; > } > > static void gen_exception(DisasContext *ctx, uint32_t excp) > @@ -278,7 +279,8 @@ static void gen_exception(DisasContext *ctx, uint32_t excp) > t0 = tcg_const_i32(excp); > gen_helper_raise_exception(cpu_env, t0); > tcg_temp_free_i32(t0); > - ctx->exception = (excp); > + ctx->exception = excp; > + ctx->base.is_jmp = DISAS_NORETURN; > } > > static void gen_exception_nip(DisasContext *ctx, uint32_t excp, > @@ -290,7 +292,8 @@ static void gen_exception_nip(DisasContext *ctx, uint32_t excp, > t0 = tcg_const_i32(excp); > gen_helper_raise_exception(cpu_env, t0); > tcg_temp_free_i32(t0); > - ctx->exception = (excp); > + ctx->exception = excp; > + ctx->base.is_jmp = DISAS_NORETURN; > } > > /* > @@ -336,6 +339,7 @@ static void gen_debug_exception(DisasContext *ctx) > t0 = tcg_const_i32(EXCP_DEBUG); > gen_helper_raise_exception(cpu_env, t0); > tcg_temp_free_i32(t0); > + ctx->base.is_jmp = DISAS_NORETURN; > } > > static inline void gen_inval_exception(DisasContext *ctx, uint32_t error) > @@ -9374,7 +9378,6 @@ static bool ppc_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *cs, > DisasContext *ctx = container_of(dcbase, DisasContext, base); > > gen_debug_exception(ctx); > - dcbase->is_jmp = DISAS_NORETURN; > /* > * The address covered by the breakpoint must be included in > * [tb->pc, tb->pc + tb->size) in order to for it to be properly > @@ -9404,18 +9407,19 @@ static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) > ok = decode_legacy(cpu, ctx, insn); > if (!ok) { > gen_invalid(ctx); > - ctx->base.is_jmp = DISAS_NORETURN; > } > > #if defined(DO_PPC_STATISTICS) > handler->count++; > #endif > + > /* Check trace mode exceptions */ > if (unlikely(ctx->singlestep_enabled & CPU_SINGLE_STEP && > (ctx->base.pc_next <= 0x100 || ctx->base.pc_next > 0xF00) && > ctx->exception != POWERPC_SYSCALL && > ctx->exception != POWERPC_EXCP_TRAP && > - ctx->exception != POWERPC_EXCP_BRANCH)) { > + ctx->exception != POWERPC_EXCP_BRANCH && > + ctx->base.is_jmp != DISAS_NORETURN)) { > uint32_t excp = gen_prep_dbgex(ctx); > gen_exception_nip(ctx, excp, ctx->base.pc_next); > } > @@ -9426,14 +9430,20 @@ static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) > opc3(ctx->opcode), opc4(ctx->opcode), ctx->opcode); > } > > - ctx->base.is_jmp = ctx->exception == POWERPC_EXCP_NONE ? > - DISAS_NEXT : DISAS_NORETURN; > + if (ctx->base.is_jmp == DISAS_NEXT > + && ctx->exception != POWERPC_EXCP_NONE) { > + ctx->base.is_jmp = DISAS_TOO_MANY; > + } > } > > static void ppc_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs) > { > DisasContext *ctx = container_of(dcbase, DisasContext, base); > > + if (ctx->base.is_jmp == DISAS_NORETURN) { > + return; > + } > + > if (ctx->exception == POWERPC_EXCP_NONE) { > gen_goto_tb(ctx, 0, ctx->base.pc_next); > } else if (ctx->exception != POWERPC_EXCP_BRANCH) {
diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 3ad4c7163d..616ffc1508 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -261,7 +261,8 @@ static void gen_exception_err(DisasContext *ctx, uint32_t excp, uint32_t error) gen_helper_raise_exception_err(cpu_env, t0, t1); tcg_temp_free_i32(t0); tcg_temp_free_i32(t1); - ctx->exception = (excp); + ctx->exception = excp; + ctx->base.is_jmp = DISAS_NORETURN; } static void gen_exception(DisasContext *ctx, uint32_t excp) @@ -278,7 +279,8 @@ static void gen_exception(DisasContext *ctx, uint32_t excp) t0 = tcg_const_i32(excp); gen_helper_raise_exception(cpu_env, t0); tcg_temp_free_i32(t0); - ctx->exception = (excp); + ctx->exception = excp; + ctx->base.is_jmp = DISAS_NORETURN; } static void gen_exception_nip(DisasContext *ctx, uint32_t excp, @@ -290,7 +292,8 @@ static void gen_exception_nip(DisasContext *ctx, uint32_t excp, t0 = tcg_const_i32(excp); gen_helper_raise_exception(cpu_env, t0); tcg_temp_free_i32(t0); - ctx->exception = (excp); + ctx->exception = excp; + ctx->base.is_jmp = DISAS_NORETURN; } /* @@ -336,6 +339,7 @@ static void gen_debug_exception(DisasContext *ctx) t0 = tcg_const_i32(EXCP_DEBUG); gen_helper_raise_exception(cpu_env, t0); tcg_temp_free_i32(t0); + ctx->base.is_jmp = DISAS_NORETURN; } static inline void gen_inval_exception(DisasContext *ctx, uint32_t error) @@ -9374,7 +9378,6 @@ static bool ppc_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *cs, DisasContext *ctx = container_of(dcbase, DisasContext, base); gen_debug_exception(ctx); - dcbase->is_jmp = DISAS_NORETURN; /* * The address covered by the breakpoint must be included in * [tb->pc, tb->pc + tb->size) in order to for it to be properly @@ -9404,18 +9407,19 @@ static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) ok = decode_legacy(cpu, ctx, insn); if (!ok) { gen_invalid(ctx); - ctx->base.is_jmp = DISAS_NORETURN; } #if defined(DO_PPC_STATISTICS) handler->count++; #endif + /* Check trace mode exceptions */ if (unlikely(ctx->singlestep_enabled & CPU_SINGLE_STEP && (ctx->base.pc_next <= 0x100 || ctx->base.pc_next > 0xF00) && ctx->exception != POWERPC_SYSCALL && ctx->exception != POWERPC_EXCP_TRAP && - ctx->exception != POWERPC_EXCP_BRANCH)) { + ctx->exception != POWERPC_EXCP_BRANCH && + ctx->base.is_jmp != DISAS_NORETURN)) { uint32_t excp = gen_prep_dbgex(ctx); gen_exception_nip(ctx, excp, ctx->base.pc_next); } @@ -9426,14 +9430,20 @@ static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) opc3(ctx->opcode), opc4(ctx->opcode), ctx->opcode); } - ctx->base.is_jmp = ctx->exception == POWERPC_EXCP_NONE ? - DISAS_NEXT : DISAS_NORETURN; + if (ctx->base.is_jmp == DISAS_NEXT + && ctx->exception != POWERPC_EXCP_NONE) { + ctx->base.is_jmp = DISAS_TOO_MANY; + } } static void ppc_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs) { DisasContext *ctx = container_of(dcbase, DisasContext, base); + if (ctx->base.is_jmp == DISAS_NORETURN) { + return; + } + if (ctx->exception == POWERPC_EXCP_NONE) { gen_goto_tb(ctx, 0, ctx->base.pc_next); } else if (ctx->exception != POWERPC_EXCP_BRANCH) {