| Message ID | 20210512185441.3619828-6-matheus.ferst@eldorado.org.br (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Base for adding PowerPC 64-bit instructions | expand |
On Wed, May 12, 2021 at 03:54:15PM -0300, matheus.ferst@eldorado.org.br wrote: > From: Richard Henderson <richard.henderson@linaro.org> > > Since POWERPC_EXCP_TRAP is raised by gen_exception_err, > we will have also set DISAS_NORETURN. > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > Reviewed-by: Luis Pires <luis.pires@eldorado.org.br> > Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Applied to ppc-for-6.1, thanks. > --- > target/ppc/translate.c | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/target/ppc/translate.c b/target/ppc/translate.c > index 2303bf259a..23de04a08e 100644 > --- a/target/ppc/translate.c > +++ b/target/ppc/translate.c > @@ -9416,7 +9416,6 @@ static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) > /* Check trace mode exceptions */ > if (unlikely(ctx->singlestep_enabled & CPU_SINGLE_STEP && > (ctx->base.pc_next <= 0x100 || ctx->base.pc_next > 0xF00) && > - ctx->exception != POWERPC_EXCP_TRAP && > ctx->exception != POWERPC_EXCP_BRANCH && > ctx->base.is_jmp != DISAS_NORETURN)) { > uint32_t excp = gen_prep_dbgex(ctx);
diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 2303bf259a..23de04a08e 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -9416,7 +9416,6 @@ static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) /* Check trace mode exceptions */ if (unlikely(ctx->singlestep_enabled & CPU_SINGLE_STEP && (ctx->base.pc_next <= 0x100 || ctx->base.pc_next > 0xF00) && - ctx->exception != POWERPC_EXCP_TRAP && ctx->exception != POWERPC_EXCP_BRANCH && ctx->base.is_jmp != DISAS_NORETURN)) { uint32_t excp = gen_prep_dbgex(ctx);