[PULL,05/15] target/mips: Do not abort on invalid instruction

Commit Message

Philippe Mathieu-Daudé June 25, 2021, 9:23 a.m. UTC

On real hardware an invalid instruction doesn't halt the world,
but usually triggers a RESERVED INSTRUCTION exception.
TCG guest code shouldn't abort QEMU anyway.

Signed-off-by: Philippe Mathieu-Daudé <[e-mail]>
Reviewed-by: Richard Henderson <[e-mail]>
Message-Id: <[e-mail]>
---
 target/mips/tcg/translate.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Patch

diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c
index 3fd0c48d772..4b7229a868a 100644
--- a/target/mips/tcg/translate.c
+++ b/target/mips/tcg/translate.c
@@ -12151,8 +12151,8 @@  static void gen_branch(DisasContext *ctx, int insn_bytes)
             tcg_gen_lookup_and_goto_ptr();
             break;
         default:
-            fprintf(stderr, "unknown branch 0x%x\n", proc_hflags);
-            abort();
+            LOG_DISAS("unknown branch 0x%x\n", proc_hflags);
+            gen_reserved_instruction(ctx);
         }
     }
 }