| Message ID | 20210729111512.16541-54-peter.maydell@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | target/arm: MVE slices 3 and 4 | expand |
On 7/29/21 1:15 AM, Peter Maydell wrote: > We now have a complete MVE emulation, so we can enable it in our > Cortex-M55 model by setting the ID registers to match those of a > Cortex-M55 with full MVE support. > > Signed-off-by: Peter Maydell<peter.maydell@linaro.org> > --- > docs/system/arm/emulation.rst | 1 + > target/arm/cpu_tcg.c | 7 ++----- > 2 files changed, 3 insertions(+), 5 deletions(-) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst index 144dc491d95..89310e4842f 100644 --- a/docs/system/arm/emulation.rst +++ b/docs/system/arm/emulation.rst @@ -87,6 +87,7 @@ for the following architecture extensions: - LOB (Low Overhead loops and Branch future) - M (Main Extension) - MPU (Memory Protection Unit Extension) +- MVE (M-Profile Vector Extension) - PXN (Privileged Execute Never) - RAS (Reliability, Serviceability and Availability): "minimum RAS Extension" only - S (Security Extension) diff --git a/target/arm/cpu_tcg.c b/target/arm/cpu_tcg.c index ed444bf436a..33cc75af57d 100644 --- a/target/arm/cpu_tcg.c +++ b/target/arm/cpu_tcg.c @@ -654,12 +654,9 @@ static void cortex_m55_initfn(Object *obj) cpu->revidr = 0; cpu->pmsav7_dregion = 16; cpu->sau_sregion = 8; - /* - * These are the MVFR* values for the FPU, no MVE configuration; - * we will update them later when we implement MVE - */ + /* These are the MVFR* values for the FPU + full MVE configuration */ cpu->isar.mvfr0 = 0x10110221; - cpu->isar.mvfr1 = 0x12100011; + cpu->isar.mvfr1 = 0x12100211; cpu->isar.mvfr2 = 0x00000040; cpu->isar.id_pfr0 = 0x20000030; cpu->isar.id_pfr1 = 0x00000230;
We now have a complete MVE emulation, so we can enable it in our Cortex-M55 model by setting the ID registers to match those of a Cortex-M55 with full MVE support. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- docs/system/arm/emulation.rst | 1 + target/arm/cpu_tcg.c | 7 ++----- 2 files changed, 3 insertions(+), 5 deletions(-)