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[v2,12/14] target/ppc: 405: Instruction storage interrupt cleanup

Message ID 20220118184448.852996-13-farosas@linux.ibm.com (mailing list archive)
State New, archived
Headers show
Series target/ppc: powerpc_excp improvements [40x] (3/n) | expand

Commit Message

Fabiano Rosas Jan. 18, 2022, 6:44 p.m. UTC 
The 405 ISI does not set SRR1 with any exception syndrome bits, only a
clean copy of the MSR.

Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>
---
 target/ppc/excp_helper.c | 1 -
 1 file changed, 1 deletion(-)

Comments

Cédric Le Goater Jan. 20, 2022, 10:17 p.m. UTC | #1 
On 1/18/22 19:44, Fabiano Rosas wrote:
> The 405 ISI does not set SRR1 with any exception syndrome bits, only a
> clean copy of the MSR.
> 
> Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>
> ---
>   target/ppc/excp_helper.c | 1 -
>   1 file changed, 1 deletion(-)
> 
> diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
> index e4e513322c..13674a102f 100644
> --- a/target/ppc/excp_helper.c
> +++ b/target/ppc/excp_helper.c
> @@ -715,7 +715,6 @@ static inline void powerpc_excp_legacy(PowerPCCPU *cpu, int excp)

This change is done in the wrong routine.

Thanks,

C.

>           break;
>       case POWERPC_EXCP_ISI:       /* Instruction storage exception            */
>           trace_ppc_excp_isi(msr, env->nip);
> -        msr |= env->error_code;
>           break;
>       case POWERPC_EXCP_EXTERNAL:  /* External input                           */
>       {
>
Cédric Le Goater Jan. 25, 2022, 7:24 a.m. UTC | #2 
On 1/18/22 19:44, Fabiano Rosas wrote:
> The 405 ISI does not set SRR1 with any exception syndrome bits, only a
> clean copy of the MSR.
> 
> Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>

I changed the routine in which the removal was done. With that,

Reviewed-by: Cédric Le Goater <clg@kaod.org>


Thanks,

C.
> ---
>   target/ppc/excp_helper.c | 1 -
>   1 file changed, 1 deletion(-)
> 
> diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
> index e4e513322c..13674a102f 100644
> --- a/target/ppc/excp_helper.c
> +++ b/target/ppc/excp_helper.c
> @@ -715,7 +715,6 @@ static inline void powerpc_excp_legacy(PowerPCCPU *cpu, int excp)
>           break;
>       case POWERPC_EXCP_ISI:       /* Instruction storage exception            */
>           trace_ppc_excp_isi(msr, env->nip);
> -        msr |= env->error_code;
>           break;
>       case POWERPC_EXCP_EXTERNAL:  /* External input                           */
>       {
>
diff mbox series

Patch

diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index e4e513322c..13674a102f 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -715,7 +715,6 @@  static inline void powerpc_excp_legacy(PowerPCCPU *cpu, int excp)
         break;
     case POWERPC_EXCP_ISI:       /* Instruction storage exception            */
         trace_ppc_excp_isi(msr, env->nip);
-        msr |= env->error_code;
         break;
     case POWERPC_EXCP_EXTERNAL:  /* External input                           */
     {