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[RFC,13/15] hw/mips: Restrict MIPSCPU type to target/ code

Message ID 20220209215446.58402-14-f4bug@amsat.org (mailing list archive)
State New, archived
Headers show
Series target: Use ArchCPU & CPUArchState as abstract interface to target CPU | expand

Commit Message

Philippe Mathieu-Daudé Feb. 9, 2022, 9:54 p.m. UTC 
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 include/hw/mips/cpudevs.h | 6 ++----
 target/mips/cpu-qom.h     | 2 --
 target/mips/cpu.h         | 4 ++--
 3 files changed, 4 insertions(+), 8 deletions(-)
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Patch

diff --git a/include/hw/mips/cpudevs.h b/include/hw/mips/cpudevs.h
index f7c9728fa9..6065932b0e 100644
--- a/include/hw/mips/cpudevs.h
+++ b/include/hw/mips/cpudevs.h
@@ -1,14 +1,12 @@ 
 #ifndef HW_MIPS_CPUDEVS_H
 #define HW_MIPS_CPUDEVS_H
 
-#include "target/mips/cpu-qom.h"
-
 /* Definitions for MIPS CPU internal devices.  */
 
 /* mips_int.c */
-void cpu_mips_irq_init_cpu(MIPSCPU *cpu);
+void cpu_mips_irq_init_cpu(ArchCPU *cpu);
 
 /* mips_timer.c */
-void cpu_mips_clock_init(MIPSCPU *cpu);
+void cpu_mips_clock_init(ArchCPU *cpu);
 
 #endif
diff --git a/target/mips/cpu-qom.h b/target/mips/cpu-qom.h
index 41f3d01a80..666084b09e 100644
--- a/target/mips/cpu-qom.h
+++ b/target/mips/cpu-qom.h
@@ -29,8 +29,6 @@ 
 #define TYPE_MIPS_CPU "mips-cpu"
 #endif
 
-typedef struct ArchCPU MIPSCPU;
-
 OBJECT_DECLARE_TYPE(ArchCPU, MIPSCPUClass,
                     MIPS_CPU)
 
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 09e98f64de..4aa95d0ce1 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -1171,7 +1171,7 @@  typedef struct CPUArchState {
  *
  * A MIPS CPU.
  */
-struct ArchCPU {
+typedef struct ArchCPU {
     /*< private >*/
     CPUState parent_obj;
     /*< public >*/
@@ -1187,7 +1187,7 @@  struct ArchCPU {
      * pipeline clock of the processor, not the issue width of the processor.
      */
     unsigned cp0_count_rate;
-};
+} MIPSCPU;
 
 
 void mips_cpu_list(void);