diff mbox series

[for-7.1] target/mips: Remove stale TODO file

Message ID 20220412113824.297108-1-thuth@redhat.com (mailing list archive)
State New, archived
Headers show
Series [for-7.1] target/mips: Remove stale TODO file | expand

Commit Message

Thomas Huth April 12, 2022, 11:38 a.m. UTC
The last change to this file has been done in 2012, so it
seems like this is not really used anymore, and the content
is likely very out of date now.

Signed-off-by: Thomas Huth <thuth@redhat.com>
---
 target/mips/TODO | 51 ------------------------------------------------
 1 file changed, 51 deletions(-)
 delete mode 100644 target/mips/TODO

Comments

Richard Henderson April 12, 2022, 2:33 p.m. UTC | #1
On 4/12/22 04:38, Thomas Huth wrote:
> The last change to this file has been done in 2012, so it
> seems like this is not really used anymore, and the content
> is likely very out of date now.
> 
> Signed-off-by: Thomas Huth<thuth@redhat.com>
> ---
>   target/mips/TODO | 51 ------------------------------------------------
>   1 file changed, 51 deletions(-)
>   delete mode 100644 target/mips/TODO

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~
Laurent Vivier April 26, 2022, 10:36 a.m. UTC | #2
Le 12/04/2022 à 13:38, Thomas Huth a écrit :
> The last change to this file has been done in 2012, so it
> seems like this is not really used anymore, and the content
> is likely very out of date now.
> 
> Signed-off-by: Thomas Huth <thuth@redhat.com>
> ---
>   target/mips/TODO | 51 ------------------------------------------------
>   1 file changed, 51 deletions(-)
>   delete mode 100644 target/mips/TODO
> 
> diff --git a/target/mips/TODO b/target/mips/TODO
> deleted file mode 100644
> index 1d782d8027..0000000000
> --- a/target/mips/TODO
> +++ /dev/null
> @@ -1,51 +0,0 @@
> -Unsolved issues/bugs in the mips/mipsel backend
> ------------------------------------------------
> -
> -General
> --------
> -- Unimplemented ASEs:
> -  - MDMX
> -  - SmartMIPS
> -  - microMIPS DSP r1 & r2 encodings
> -- MT ASE only partially implemented and not functional
> -- Shadow register support only partially implemented,
> -  lacks set switching on interrupt/exception.
> -- 34K ITC not implemented.
> -- A general lack of documentation, especially for technical internals.
> -  Existing documentation is x86-centric.
> -- Reverse endianness bit not implemented
> -- The TLB emulation is very inefficient:
> -  QEMU's softmmu implements a x86-style MMU, with separate entries
> -  for read/write/execute, a TLB index which is just a modulo of the
> -  virtual address, and a set of TLBs for each user/kernel/supervisor
> -  MMU mode.
> -  MIPS has a single entry for read/write/execute and only one MMU mode.
> -  But it is fully associative with randomized entry indices, and uses
> -  up to 256 ASID tags as additional matching criterion (which roughly
> -  equates to 256 MMU modes). It also has a global flag which causes
> -  entries to match regardless of ASID.
> -  To cope with these differences, QEMU currently flushes the TLB at
> -  each ASID change. Using the MMU modes to implement ASIDs hinges on
> -  implementing the global bit efficiently.
> -- save/restore of the CPU state is not implemented (see machine.c).
> -
> -MIPS64
> -------
> -- Userland emulation (both n32 and n64) not functional.
> -
> -"Generic" 4Kc system emulation
> -------------------------------
> -- Doesn't correspond to any real hardware. Should be removed some day,
> -  U-Boot is the last remaining user.
> -
> -PICA 61 system emulation
> -------------------------
> -- No framebuffer support yet.
> -
> -MALTA system emulation
> -----------------------
> -- We fake firmware support instead of doing the real thing
> -- Real firmware (YAMON) falls over when trying to init RAM, presumably
> -  due to lacking system controller emulation.
> -- Bonito system controller not implemented
> -- MSC1 system controller not implemented

Applied to my trivial-patches branch.

Thanks,
Laurent
Philippe Mathieu-Daudé May 9, 2022, 12:19 p.m. UTC | #3
On 26/4/22 12:36, Laurent Vivier wrote:
> Le 12/04/2022 à 13:38, Thomas Huth a écrit :
>> The last change to this file has been done in 2012, so it
>> seems like this is not really used anymore, and the content
>> is likely very out of date now.
>>
>> Signed-off-by: Thomas Huth <thuth@redhat.com>
>> ---
>>   target/mips/TODO | 51 ------------------------------------------------
>>   1 file changed, 51 deletions(-)
>>   delete mode 100644 target/mips/TODO

> Applied to my trivial-patches branch.

Thanks :)
diff mbox series

Patch

diff --git a/target/mips/TODO b/target/mips/TODO
deleted file mode 100644
index 1d782d8027..0000000000
--- a/target/mips/TODO
+++ /dev/null
@@ -1,51 +0,0 @@ 
-Unsolved issues/bugs in the mips/mipsel backend
------------------------------------------------
-
-General
--------
-- Unimplemented ASEs:
-  - MDMX
-  - SmartMIPS
-  - microMIPS DSP r1 & r2 encodings
-- MT ASE only partially implemented and not functional
-- Shadow register support only partially implemented,
-  lacks set switching on interrupt/exception.
-- 34K ITC not implemented.
-- A general lack of documentation, especially for technical internals.
-  Existing documentation is x86-centric.
-- Reverse endianness bit not implemented
-- The TLB emulation is very inefficient:
-  QEMU's softmmu implements a x86-style MMU, with separate entries
-  for read/write/execute, a TLB index which is just a modulo of the
-  virtual address, and a set of TLBs for each user/kernel/supervisor
-  MMU mode.
-  MIPS has a single entry for read/write/execute and only one MMU mode.
-  But it is fully associative with randomized entry indices, and uses
-  up to 256 ASID tags as additional matching criterion (which roughly
-  equates to 256 MMU modes). It also has a global flag which causes
-  entries to match regardless of ASID.
-  To cope with these differences, QEMU currently flushes the TLB at
-  each ASID change. Using the MMU modes to implement ASIDs hinges on
-  implementing the global bit efficiently.
-- save/restore of the CPU state is not implemented (see machine.c).
-
-MIPS64
-------
-- Userland emulation (both n32 and n64) not functional.
-
-"Generic" 4Kc system emulation
-------------------------------
-- Doesn't correspond to any real hardware. Should be removed some day,
-  U-Boot is the last remaining user.
-
-PICA 61 system emulation
-------------------------
-- No framebuffer support yet.
-
-MALTA system emulation
-----------------------
-- We fake firmware support instead of doing the real thing
-- Real firmware (YAMON) falls over when trying to init RAM, presumably
-  due to lacking system controller emulation.
-- Bonito system controller not implemented
-- MSC1 system controller not implemented