Message ID | 20230220081252.25348-3-qianfanguijin@163.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [v2,1/3] hw: allwinner-i2c: Make the trace message more readable | expand |
(adding Niek to the thread as well) On Mon, Feb 20, 2023 at 9:13 AM <qianfanguijin@163.com> wrote: > > From: qianfan Zhao <qianfanguijin@163.com> > > Allwinner h3 has 4 twi(i2c) devices named twi0, twi1, twi2 and r_twi. > The registers are compatible with TYPE_AW_I2C_SUN6I, write 1 to clear > control register's INT_FLAG bit. > > Signed-off-by: qianfan Zhao <qianfanguijin@163.com> > --- > hw/arm/allwinner-h3.c | 29 +++++++++++++++++++++++++---- > include/hw/arm/allwinner-h3.h | 6 ++++++ > 2 files changed, 31 insertions(+), 4 deletions(-) > > diff --git a/hw/arm/allwinner-h3.c b/hw/arm/allwinner-h3.c > index bfce3c8d92..69d0ad6f50 100644 > --- a/hw/arm/allwinner-h3.c > +++ b/hw/arm/allwinner-h3.c > @@ -54,6 +54,8 @@ const hwaddr allwinner_h3_memmap[] = { > [AW_H3_DEV_UART2] = 0x01c28800, > [AW_H3_DEV_UART3] = 0x01c28c00, > [AW_H3_DEV_TWI0] = 0x01c2ac00, > + [AW_H3_DEV_TWI1] = 0x01c2b000, > + [AW_H3_DEV_TWI2] = 0x01c2b400, > [AW_H3_DEV_EMAC] = 0x01c30000, > [AW_H3_DEV_DRAMCOM] = 0x01c62000, > [AW_H3_DEV_DRAMCTL] = 0x01c63000, > @@ -64,6 +66,7 @@ const hwaddr allwinner_h3_memmap[] = { > [AW_H3_DEV_GIC_VCPU] = 0x01c86000, > [AW_H3_DEV_RTC] = 0x01f00000, > [AW_H3_DEV_CPUCFG] = 0x01f01c00, > + [AW_H3_DEV_R_TWI] = 0x01f02400, > [AW_H3_DEV_SDRAM] = 0x40000000 > }; > > @@ -107,8 +110,6 @@ struct AwH3Unimplemented { > { "uart1", 0x01c28400, 1 * KiB }, > { "uart2", 0x01c28800, 1 * KiB }, > { "uart3", 0x01c28c00, 1 * KiB }, > - { "twi1", 0x01c2b000, 1 * KiB }, > - { "twi2", 0x01c2b400, 1 * KiB }, > { "scr", 0x01c2c400, 1 * KiB }, > { "gpu", 0x01c40000, 64 * KiB }, > { "hstmr", 0x01c60000, 4 * KiB }, > @@ -123,7 +124,6 @@ struct AwH3Unimplemented { > { "r_prcm", 0x01f01400, 1 * KiB }, > { "r_twd", 0x01f01800, 1 * KiB }, > { "r_cir-rx", 0x01f02000, 1 * KiB }, > - { "r_twi", 0x01f02400, 1 * KiB }, > { "r_uart", 0x01f02800, 1 * KiB }, > { "r_pio", 0x01f02c00, 1 * KiB }, > { "r_pwm", 0x01f03800, 1 * KiB }, > @@ -151,8 +151,11 @@ enum { > AW_H3_GIC_SPI_UART2 = 2, > AW_H3_GIC_SPI_UART3 = 3, > AW_H3_GIC_SPI_TWI0 = 6, > + AW_H3_GIC_SPI_TWI1 = 7, > + AW_H3_GIC_SPI_TWI2 = 8, > AW_H3_GIC_SPI_TIMER0 = 18, > AW_H3_GIC_SPI_TIMER1 = 19, > + AW_H3_GIC_SPI_R_TWI = 44, > AW_H3_GIC_SPI_MMC0 = 60, > AW_H3_GIC_SPI_EHCI0 = 72, > AW_H3_GIC_SPI_OHCI0 = 73, > @@ -227,7 +230,10 @@ static void allwinner_h3_init(Object *obj) > > object_initialize_child(obj, "rtc", &s->rtc, TYPE_AW_RTC_SUN6I); > > - object_initialize_child(obj, "twi0", &s->i2c0, TYPE_AW_I2C); > + object_initialize_child(obj, "twi0", &s->i2c0, TYPE_AW_I2C_SUN6I); > + object_initialize_child(obj, "twi1", &s->i2c1, TYPE_AW_I2C_SUN6I); > + object_initialize_child(obj, "twi2", &s->i2c2, TYPE_AW_I2C_SUN6I); > + object_initialize_child(obj, "r_twi", &s->r_twi, TYPE_AW_I2C_SUN6I); > } > > static void allwinner_h3_realize(DeviceState *dev, Error **errp) > @@ -432,6 +438,21 @@ static void allwinner_h3_realize(DeviceState *dev, Error **errp) > sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c0), 0, > qdev_get_gpio_in(DEVICE(&s->gic), AW_H3_GIC_SPI_TWI0)); > > + sysbus_realize(SYS_BUS_DEVICE(&s->i2c1), &error_fatal); > + sysbus_mmio_map(SYS_BUS_DEVICE(&s->i2c1), 0, s->memmap[AW_H3_DEV_TWI1]); > + sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c1), 0, > + qdev_get_gpio_in(DEVICE(&s->gic), AW_H3_GIC_SPI_TWI1)); > + > + sysbus_realize(SYS_BUS_DEVICE(&s->i2c2), &error_fatal); > + sysbus_mmio_map(SYS_BUS_DEVICE(&s->i2c2), 0, s->memmap[AW_H3_DEV_TWI2]); > + sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c2), 0, > + qdev_get_gpio_in(DEVICE(&s->gic), AW_H3_GIC_SPI_TWI2)); > + > + sysbus_realize(SYS_BUS_DEVICE(&s->r_twi), &error_fatal); > + sysbus_mmio_map(SYS_BUS_DEVICE(&s->r_twi), 0, s->memmap[AW_H3_DEV_R_TWI]); > + sysbus_connect_irq(SYS_BUS_DEVICE(&s->r_twi), 0, > + qdev_get_gpio_in(DEVICE(&s->gic), AW_H3_GIC_SPI_R_TWI)); > + > /* Unimplemented devices */ > for (i = 0; i < ARRAY_SIZE(unimplemented); i++) { > create_unimplemented_device(unimplemented[i].device_name, > diff --git a/include/hw/arm/allwinner-h3.h b/include/hw/arm/allwinner-h3.h > index 1d7ce20589..59e0f822d2 100644 > --- a/include/hw/arm/allwinner-h3.h > +++ b/include/hw/arm/allwinner-h3.h > @@ -84,6 +84,8 @@ enum { > AW_H3_DEV_UART3, > AW_H3_DEV_EMAC, > AW_H3_DEV_TWI0, > + AW_H3_DEV_TWI1, > + AW_H3_DEV_TWI2, > AW_H3_DEV_DRAMCOM, > AW_H3_DEV_DRAMCTL, > AW_H3_DEV_DRAMPHY, > @@ -93,6 +95,7 @@ enum { > AW_H3_DEV_GIC_VCPU, > AW_H3_DEV_RTC, > AW_H3_DEV_CPUCFG, > + AW_H3_DEV_R_TWI, > AW_H3_DEV_SDRAM > }; > > @@ -133,6 +136,9 @@ struct AwH3State { > AwSidState sid; > AwSdHostState mmc0; > AWI2CState i2c0; > + AWI2CState i2c1; > + AWI2CState i2c2; > + AWI2CState r_twi; > AwSun8iEmacState emac; > AwRtcState rtc; > GICState gic; > -- > 2.25.1 > As far as I can see, the TWI for H3 is indeed treated as "allwinner,sun6i-a31-i2c" in Linux, so it should have W1C functionality and use TYPE_AW_I2C_SUN6I. Reviewed-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com> Best regards, Strahinja
On Mon, 20 Feb 2023 at 08:13, <qianfanguijin@163.com> wrote: > > From: qianfan Zhao <qianfanguijin@163.com> > > Allwinner h3 has 4 twi(i2c) devices named twi0, twi1, twi2 and r_twi. > The registers are compatible with TYPE_AW_I2C_SUN6I, write 1 to clear > control register's INT_FLAG bit. > > Signed-off-by: qianfan Zhao <qianfanguijin@163.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> thanks -- PMM
diff --git a/hw/arm/allwinner-h3.c b/hw/arm/allwinner-h3.c index bfce3c8d92..69d0ad6f50 100644 --- a/hw/arm/allwinner-h3.c +++ b/hw/arm/allwinner-h3.c @@ -54,6 +54,8 @@ const hwaddr allwinner_h3_memmap[] = { [AW_H3_DEV_UART2] = 0x01c28800, [AW_H3_DEV_UART3] = 0x01c28c00, [AW_H3_DEV_TWI0] = 0x01c2ac00, + [AW_H3_DEV_TWI1] = 0x01c2b000, + [AW_H3_DEV_TWI2] = 0x01c2b400, [AW_H3_DEV_EMAC] = 0x01c30000, [AW_H3_DEV_DRAMCOM] = 0x01c62000, [AW_H3_DEV_DRAMCTL] = 0x01c63000, @@ -64,6 +66,7 @@ const hwaddr allwinner_h3_memmap[] = { [AW_H3_DEV_GIC_VCPU] = 0x01c86000, [AW_H3_DEV_RTC] = 0x01f00000, [AW_H3_DEV_CPUCFG] = 0x01f01c00, + [AW_H3_DEV_R_TWI] = 0x01f02400, [AW_H3_DEV_SDRAM] = 0x40000000 }; @@ -107,8 +110,6 @@ struct AwH3Unimplemented { { "uart1", 0x01c28400, 1 * KiB }, { "uart2", 0x01c28800, 1 * KiB }, { "uart3", 0x01c28c00, 1 * KiB }, - { "twi1", 0x01c2b000, 1 * KiB }, - { "twi2", 0x01c2b400, 1 * KiB }, { "scr", 0x01c2c400, 1 * KiB }, { "gpu", 0x01c40000, 64 * KiB }, { "hstmr", 0x01c60000, 4 * KiB }, @@ -123,7 +124,6 @@ struct AwH3Unimplemented { { "r_prcm", 0x01f01400, 1 * KiB }, { "r_twd", 0x01f01800, 1 * KiB }, { "r_cir-rx", 0x01f02000, 1 * KiB }, - { "r_twi", 0x01f02400, 1 * KiB }, { "r_uart", 0x01f02800, 1 * KiB }, { "r_pio", 0x01f02c00, 1 * KiB }, { "r_pwm", 0x01f03800, 1 * KiB }, @@ -151,8 +151,11 @@ enum { AW_H3_GIC_SPI_UART2 = 2, AW_H3_GIC_SPI_UART3 = 3, AW_H3_GIC_SPI_TWI0 = 6, + AW_H3_GIC_SPI_TWI1 = 7, + AW_H3_GIC_SPI_TWI2 = 8, AW_H3_GIC_SPI_TIMER0 = 18, AW_H3_GIC_SPI_TIMER1 = 19, + AW_H3_GIC_SPI_R_TWI = 44, AW_H3_GIC_SPI_MMC0 = 60, AW_H3_GIC_SPI_EHCI0 = 72, AW_H3_GIC_SPI_OHCI0 = 73, @@ -227,7 +230,10 @@ static void allwinner_h3_init(Object *obj) object_initialize_child(obj, "rtc", &s->rtc, TYPE_AW_RTC_SUN6I); - object_initialize_child(obj, "twi0", &s->i2c0, TYPE_AW_I2C); + object_initialize_child(obj, "twi0", &s->i2c0, TYPE_AW_I2C_SUN6I); + object_initialize_child(obj, "twi1", &s->i2c1, TYPE_AW_I2C_SUN6I); + object_initialize_child(obj, "twi2", &s->i2c2, TYPE_AW_I2C_SUN6I); + object_initialize_child(obj, "r_twi", &s->r_twi, TYPE_AW_I2C_SUN6I); } static void allwinner_h3_realize(DeviceState *dev, Error **errp) @@ -432,6 +438,21 @@ static void allwinner_h3_realize(DeviceState *dev, Error **errp) sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c0), 0, qdev_get_gpio_in(DEVICE(&s->gic), AW_H3_GIC_SPI_TWI0)); + sysbus_realize(SYS_BUS_DEVICE(&s->i2c1), &error_fatal); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->i2c1), 0, s->memmap[AW_H3_DEV_TWI1]); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c1), 0, + qdev_get_gpio_in(DEVICE(&s->gic), AW_H3_GIC_SPI_TWI1)); + + sysbus_realize(SYS_BUS_DEVICE(&s->i2c2), &error_fatal); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->i2c2), 0, s->memmap[AW_H3_DEV_TWI2]); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c2), 0, + qdev_get_gpio_in(DEVICE(&s->gic), AW_H3_GIC_SPI_TWI2)); + + sysbus_realize(SYS_BUS_DEVICE(&s->r_twi), &error_fatal); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->r_twi), 0, s->memmap[AW_H3_DEV_R_TWI]); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->r_twi), 0, + qdev_get_gpio_in(DEVICE(&s->gic), AW_H3_GIC_SPI_R_TWI)); + /* Unimplemented devices */ for (i = 0; i < ARRAY_SIZE(unimplemented); i++) { create_unimplemented_device(unimplemented[i].device_name, diff --git a/include/hw/arm/allwinner-h3.h b/include/hw/arm/allwinner-h3.h index 1d7ce20589..59e0f822d2 100644 --- a/include/hw/arm/allwinner-h3.h +++ b/include/hw/arm/allwinner-h3.h @@ -84,6 +84,8 @@ enum { AW_H3_DEV_UART3, AW_H3_DEV_EMAC, AW_H3_DEV_TWI0, + AW_H3_DEV_TWI1, + AW_H3_DEV_TWI2, AW_H3_DEV_DRAMCOM, AW_H3_DEV_DRAMCTL, AW_H3_DEV_DRAMPHY, @@ -93,6 +95,7 @@ enum { AW_H3_DEV_GIC_VCPU, AW_H3_DEV_RTC, AW_H3_DEV_CPUCFG, + AW_H3_DEV_R_TWI, AW_H3_DEV_SDRAM }; @@ -133,6 +136,9 @@ struct AwH3State { AwSidState sid; AwSdHostState mmc0; AWI2CState i2c0; + AWI2CState i2c1; + AWI2CState i2c2; + AWI2CState r_twi; AwSun8iEmacState emac; AwRtcState rtc; GICState gic;