diff mbox series

[02/12] next-cube.c: don't pulse SCSI DMA IRQ upon reception of FLUSH command

Message ID 20231215200009.346212-3-mark.cave-ayland@ilande.co.uk (mailing list archive)
State New, archived
Headers show
Series next-cube: various tidy-ups and improvements | expand

Commit Message

Mark Cave-Ayland Dec. 15, 2023, 7:59 p.m. UTC
Normally a DMA FLUSH command is used to ensure that data is completely written
to the device and/or memory, so remove the pulse of the SCSI DMA IRQ if a DMA
FLUSH command is received. This enables the NeXT ROM monitor to start to load
from a SCSI disk.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
---
 hw/m68k/next-cube.c | 1 -
 1 file changed, 1 deletion(-)

Comments

Thomas Huth Dec. 16, 2023, 9:07 a.m. UTC | #1
Am Fri, 15 Dec 2023 19:59:59 +0000
schrieb Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>:

> Normally a DMA FLUSH command is used to ensure that data is completely written
> to the device and/or memory, so remove the pulse of the SCSI DMA IRQ if a DMA
> FLUSH command is received. This enables the NeXT ROM monitor to start to load
> from a SCSI disk.
> 
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
> ---
>  hw/m68k/next-cube.c | 1 -
>  1 file changed, 1 deletion(-)
> 
> diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c
> index feeda23475..87ddaf4329 100644
> --- a/hw/m68k/next-cube.c
> +++ b/hw/m68k/next-cube.c
> @@ -473,7 +473,6 @@ static void scr_writeb(NeXTPC *s, hwaddr addr, uint32_t value)
>              DPRINTF("SCSICSR FIFO Flush\n");
>              /* will have to add another irq to the esp if this is needed */
>              /* esp_puflush_fifo(esp_g); */
> -            qemu_irq_pulse(s->scsi_dma);
>          }
>  
>          if (value & SCSICSR_ENABLE) {

Reviewed-by: Thomas Huth <huth@tuxfamily.org>
diff mbox series

Patch

diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c
index feeda23475..87ddaf4329 100644
--- a/hw/m68k/next-cube.c
+++ b/hw/m68k/next-cube.c
@@ -473,7 +473,6 @@  static void scr_writeb(NeXTPC *s, hwaddr addr, uint32_t value)
             DPRINTF("SCSICSR FIFO Flush\n");
             /* will have to add another irq to the esp if this is needed */
             /* esp_puflush_fifo(esp_g); */
-            qemu_irq_pulse(s->scsi_dma);
         }
 
         if (value & SCSICSR_ENABLE) {