diff mbox series

[v1,3/8] target/riscv: Add the ePMP feature

Message ID 5c59f6a40a5bdff35c086f35665e97de5b872c64.1617367533.git.alistair.francis@wdc.com (mailing list archive)
State New, archived
Headers show
Series RISC-V: Add support for ePMP v0.9.1 | expand

Commit Message

Alistair Francis April 2, 2021, 12:47 p.m. UTC 
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
 target/riscv/cpu.h | 1 +
 1 file changed, 1 insertion(+)

Comments

Bin Meng April 7, 2021, 2:24 p.m. UTC | #1 
On Fri, Apr 2, 2021 at 8:50 PM Alistair Francis
<alistair.francis@wdc.com> wrote:
>

nits: I guess mentioning the ePMP spec URL in the commit message might
be helpful

> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
> ---
>  target/riscv/cpu.h | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
> index 0a33d387ba..8dcb4a4bb2 100644
> --- a/target/riscv/cpu.h
> +++ b/target/riscv/cpu.h
> @@ -80,6 +80,7 @@
>  enum {
>      RISCV_FEATURE_MMU,
>      RISCV_FEATURE_PMP,
> +    RISCV_FEATURE_EPMP,
>      RISCV_FEATURE_MISA
>  };

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
diff mbox series

Patch

diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 0a33d387ba..8dcb4a4bb2 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -80,6 +80,7 @@ 
 enum {
     RISCV_FEATURE_MMU,
     RISCV_FEATURE_PMP,
+    RISCV_FEATURE_EPMP,
     RISCV_FEATURE_MISA
 };