diff mbox series

[v1,1/1] target/riscv: Use target_ulong for the DisasContext misa

Message ID c00176c7518c2a7b4de3eec320b6a683ab56f705.1622435221.git.alistair.francis@wdc.com (mailing list archive)
State New, archived
Headers show
Series [v1,1/1] target/riscv: Use target_ulong for the DisasContext misa | expand

Commit Message

Alistair Francis May 31, 2021, 4:27 a.m. UTC
The is_32bit() check in translate.c expects a 64-bit guest to have a
64-bit misa value otherwise the macro check won't work. This patches
fixes that and fixes a Coverity issue at the same time.

Fixes: CID 1453107
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
 target/riscv/translate.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Bin Meng June 1, 2021, 11:45 a.m. UTC | #1
On Mon, May 31, 2021 at 12:27 PM Alistair Francis
<alistair.francis@wdc.com> wrote:
>
> The is_32bit() check in translate.c expects a 64-bit guest to have a
> 64-bit misa value otherwise the macro check won't work. This patches
> fixes that and fixes a Coverity issue at the same time.
>
> Fixes: CID 1453107
> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
> ---
>  target/riscv/translate.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Alistair Francis June 10, 2021, 11:02 p.m. UTC | #2
On Mon, May 31, 2021 at 2:27 PM Alistair Francis
<alistair.francis@wdc.com> wrote:
>
> The is_32bit() check in translate.c expects a 64-bit guest to have a
> 64-bit misa value otherwise the macro check won't work. This patches
> fixes that and fixes a Coverity issue at the same time.
>
> Fixes: CID 1453107
> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>

Thanks!

Applied to riscv-to-apply.next

Alistair

> ---
>  target/riscv/translate.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/riscv/translate.c b/target/riscv/translate.c
> index e945352bca..a35a58df92 100644
> --- a/target/riscv/translate.c
> +++ b/target/riscv/translate.c
> @@ -47,7 +47,7 @@ typedef struct DisasContext {
>      bool virt_enabled;
>      uint32_t opcode;
>      uint32_t mstatus_fs;
> -    uint32_t misa;
> +    target_ulong misa;
>      uint32_t mem_idx;
>      /* Remember the rounding mode encoded in the previous fp instruction,
>         which we have already installed into env->fp_status.  Or -1 for
> --
> 2.31.1
>
diff mbox series

Patch

diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index e945352bca..a35a58df92 100644
--- a/target/riscv/translate.c
+++ b/target/riscv/translate.c
@@ -47,7 +47,7 @@  typedef struct DisasContext {
     bool virt_enabled;
     uint32_t opcode;
     uint32_t mstatus_fs;
-    uint32_t misa;
+    target_ulong misa;
     uint32_t mem_idx;
     /* Remember the rounding mode encoded in the previous fp instruction,
        which we have already installed into env->fp_status.  Or -1 for