[0/2] spi: spi-ti-qspi: Support large NOR SPI flash

Message

Jean Pihet Jan. 14, 2020, 12:41 p.m. UTC

v3 release: fix compilation warnings.

Large devices are bigger than >64MB in size.
- Since the TI QSPI IP block only maps 64MB of MMIO, use MMIO
  below the 64MB boundary and software generated transfers above.
- Optimize the software generated byte-transfers for dual and quad
  I/O read operations. The speed-up is 4.9x for quad I/O reads.

Note: depends on Tony's patches for hwmod cleanup, in order to get the
desired QSPI clk rate:
- [PATCH 1/2] ARM: dts: Configure interconnect target module for am4 qspi
- [PATCH 2/2] ARM: OMAP2+: Drop legacy platform data for am4 qspi

Tested using raw accesses (mtd_debug) and JFFS2 FS read/write/erase;
in single, dual and quad modes.
All accesses have been checked on the logic analyzer.

Jean Pihet (2):
  spi: spi-ti-qspi: support large flash devices
  spi: spi-ti-qspi: optimize byte-transfers

 drivers/spi/spi-ti-qspi.c | 84 +++++++++++++++++++++++++++++++++++++--
 1 file changed, 81 insertions(+), 3 deletions(-)