@@ -170,6 +170,52 @@ ENTRY(prepare_early_mappings)
ret
ENDPROC(prepare_early_mappings)
+/*
+ * Enable EL2 MPU and data cache
+ * If the Background region is enabled, then the MPU uses the default memory
+ * map as the Background region for generating the memory
+ * attributes when MPU is disabled.
+ * Since the default memory map of the Armv8-R AArch64 architecture is
+ * IMPLEMENTATION DEFINED, we intend to turn off the Background region here.
+ *
+ * Clobbers x0
+ *
+ */
+ENTRY(enable_mpu)
+ mrs x0, SCTLR_EL2
+ orr x0, x0, #SCTLR_Axx_ELx_M /* Enable MPU */
+ orr x0, x0, #SCTLR_Axx_ELx_C /* Enable D-cache */
+ orr x0, x0, #SCTLR_Axx_ELx_WXN /* Enable WXN */
+ and x0, x0, #SCTLR_Axx_ELx_BR /* Disable Background region */
+ msr SCTLR_EL2, x0 /* now mpu memory mapping is enabled */
+ isb /* Now, flush the icache */
+ ret
+ENDPROC(enable_mpu)
+
+/*
+ * Turn on the Data Cache and the MPU. The function will return
+ * to the virtual address provided in LR (e.g. the runtime mapping).
+ *
+ * Inputs:
+ * lr : Virtual address to return to.
+ *
+ * Clobbers x0 - x7
+ */
+ENTRY(enable_boot_mm)
+ /* save return address */
+ mov x7, lr
+
+ bl prepare_early_mappings
+ bl enable_mpu
+
+ mov lr, x7
+ /*
+ * The "ret" here will use the return address in LR to
+ * return to primary_switched
+ */
+ ret
+ENDPROC(enable_boot_mm)
+
/*
* Local variables:
* mode: ASM
@@ -167,6 +167,7 @@
/* Common bits for SCTLR_ELx on all architectures */
#define SCTLR_Axx_ELx_EE BIT(25, UL)
#define SCTLR_Axx_ELx_WXN BIT(19, UL)
+#define SCTLR_Axx_ELx_BR (~BIT(17, UL))
#define SCTLR_Axx_ELx_I BIT(12, UL)
#define SCTLR_Axx_ELx_C BIT(2, UL)
#define SCTLR_Axx_ELx_A BIT(1, UL)