@@ -21,6 +21,9 @@ extern pr_t *alloc_mpumap(void);
extern int mpumap_contain_region(pr_t *table, uint8_t nr_regions,
paddr_t base, paddr_t limit, uint8_t *index);
+/* Print a walk of a MPU memory mapping table */
+void dump_mpu_walk(pr_t *table, uint8_t nr_regions);
+
#endif /* __ARCH_ARM_MM_MPU__ */
/*
@@ -898,6 +898,41 @@ pr_t *alloc_mpumap(void)
return map;
}
+void dump_mpu_walk(pr_t *table, uint8_t nr_regions)
+{
+ uint8_t i = 0;
+
+ for ( ; i < nr_regions; i++ )
+ {
+ paddr_t base, limit;
+
+ if ( region_is_valid(&table[i]) )
+ {
+ base = pr_get_base(&table[i]);
+ limit = pr_get_limit(&table[i]);
+
+ printk(XENLOG_INFO
+ "Walking MPU memory mapping table: Region[%u]: 0x%"PRIpaddr"-0x%"PRIpaddr"\n",
+ i, base, limit);
+ }
+ }
+}
+
+void dump_hyp_walk(vaddr_t addr)
+{
+ uint8_t i = 0;
+ pr_t region;
+
+ for ( i = 0; i < max_xen_mpumap; i++ )
+ {
+ read_protection_region(®ion, i);
+ if ( region_is_valid(®ion) )
+ printk(XENLOG_INFO
+ "Walking hypervisor MPU memory region [%u]: 0x%"PRIpaddr"-0x%"PRIpaddr"\n",
+ i, pr_get_base(®ion), pr_get_limit(®ion));
+ }
+}
+
/*
* Local variables:
* mode: C
@@ -481,6 +481,17 @@ void p2m_restore_state(struct vcpu *n)
*last_vcpu_ran = n->vcpu_id;
}
+void p2m_dump_info(struct domain *d)
+{
+ struct p2m_domain *p2m = p2m_get_hostp2m(d);
+
+ p2m_read_lock(p2m);
+ printk("p2m mappings for domain %d (vmid %d):\n",
+ d->domain_id, p2m->vmid);
+ printk(" Number of P2M Memory Region: %u \n", p2m->nr_regions);
+ p2m_read_unlock(p2m);
+}
+
/*
* Local variables:
* mode: C
@@ -51,8 +51,12 @@ void dump_p2m_lookup(struct domain *d, paddr_t addr)
printk("P2M @ %p mfn:%#"PRI_mfn"\n",
p2m->root, mfn_x(page_to_mfn(p2m->root)));
+#ifndef CONFIG_HAS_MPU
dump_pt_walk(page_to_maddr(p2m->root), addr,
P2M_ROOT_LEVEL, P2M_ROOT_PAGES);
+#else
+ dump_mpu_walk((pr_t *)page_to_virt(p2m->root), p2m->nr_regions);
+#endif
}
mfn_t p2m_lookup(struct domain *d, gfn_t gfn, p2m_type_t *t)
@@ -710,7 +710,11 @@ struct reg_ctxt {
#endif
/* Hypervisor-side state */
+#ifdef CONFIG_HAS_MPU
+ uint64_t vsctlr_el2;
+#else
uint64_t vttbr_el2;
+#endif
};
static const char *mode_string(register_t cpsr)
@@ -908,7 +912,11 @@ static void _show_registers(const struct cpu_user_regs *regs,
#endif
}
printk(" VTCR_EL2: %"PRIregister"\n", READ_SYSREG(VTCR_EL2));
+#ifndef CONFIG_HAS_MPU
printk(" VTTBR_EL2: %016"PRIx64"\n", ctxt->vttbr_el2);
+#else
+ printk(" VSCTLR_EL2: %016"PRIx64"\n", ctxt->vsctlr_el2);
+#endif
printk("\n");
printk(" SCTLR_EL2: %"PRIregister"\n", READ_SYSREG(SCTLR_EL2));
@@ -945,7 +953,11 @@ void show_registers(const struct cpu_user_regs *regs)
if ( guest_mode(regs) && is_32bit_domain(current->domain) )
ctxt.ifsr32_el2 = READ_SYSREG(IFSR32_EL2);
#endif
+#ifndef CONFIG_HAS_MPU
ctxt.vttbr_el2 = READ_SYSREG64(VTTBR_EL2);
+#else
+ ctxt.vsctlr_el2 = READ_SYSREG64(VSCTLR_EL2);
+#endif
_show_registers(regs, &ctxt, guest_mode(regs), current);
}
@@ -968,7 +980,11 @@ void vcpu_show_registers(const struct vcpu *v)
ctxt.ifsr32_el2 = v->arch.ifsr;
#endif
+#ifdef CONFIG_HAS_MPU
+ ctxt.vsctlr_el2 = v->domain->arch.p2m.vsctlr;
+#else
ctxt.vttbr_el2 = v->domain->arch.p2m.vttbr;
+#endif
_show_registers(&v->arch.cpu_info->guest_cpu_user_regs, &ctxt, 1, v);
}