Message ID | 20190606174609.20487-6-peter.maydell@linaro.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | target/arm: Convert VFP decoder to decodetree | expand |
On 6/6/19 12:45 PM, Peter Maydell wrote: > At the moment our -cpu max for AArch32 supports VFP short-vectors > because we always implement them, even for CPUs which should > not have them. The following commits are going to switch to > using the correct ID-register-check to enable or disable short > vector support, so we need to turn it on explicitly for -cpu max, > because Cortex-A15 doesn't implement it. > > We don't enable this for the AArch64 -cpu max, because the v8A > architecture never supports short-vectors. > > Signed-off-by: Peter Maydell <peter.maydell@linaro.org> > --- > target/arm/cpu.c | 4 ++++ > 1 file changed, 4 insertions(+) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 044c4dd738b..3f06f6d1a20 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2022,6 +2022,10 @@ static void arm_max_initfn(Object *obj) kvm_arm_set_cpu_features_from_host(cpu); } else { cortex_a15_initfn(obj); + + /* old-style VFP short-vector support */ + cpu->isar.mvfr0 = FIELD_DP32(cpu->isar.mvfr0, MVFR0, FPSHVEC, 1); + #ifdef CONFIG_USER_ONLY /* We don't set these in system emulation mode for the moment, * since we don't correctly set (all of) the ID registers to
At the moment our -cpu max for AArch32 supports VFP short-vectors because we always implement them, even for CPUs which should not have them. The following commits are going to switch to using the correct ID-register-check to enable or disable short vector support, so we need to turn it on explicitly for -cpu max, because Cortex-A15 doesn't implement it. We don't enable this for the AArch64 -cpu max, because the v8A architecture never supports short-vectors. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- target/arm/cpu.c | 4 ++++ 1 file changed, 4 insertions(+)