diff mbox series

x86/CPUID: RSTR_FP_ERR_PTRS depends on FPU

Message ID 052b6003-53a7-0563-72ac-48fe558ac549@suse.com (mailing list archive)
State New, archived
Headers show
Series x86/CPUID: RSTR_FP_ERR_PTRS depends on FPU | expand

Commit Message

Jan Beulich Sept. 25, 2019, 3:27 p.m. UTC
There's nothing to restore here if there's no FPU in the first place.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
---
To be considered for 4.13 since RSTR_FP_ERR_PTRS support was introduced
just recently.

Comments

Jürgen Groß Sept. 26, 2019, 3:23 p.m. UTC | #1
On 25.09.19 17:27, Jan Beulich wrote:
> There's nothing to restore here if there's no FPU in the first place.
> 
> Signed-off-by: Jan Beulich <jbeulich@suse.com>

Release-acked-by: Juergen Gross <jgross@suse.com>


Juergen
Jan Beulich Oct. 8, 2019, 9:32 a.m. UTC | #2
On 25.09.2019 17:27, Jan Beulich wrote:
> There's nothing to restore here if there's no FPU in the first place.
> 
> Signed-off-by: Jan Beulich <jbeulich@suse.com>
> ---
> To be considered for 4.13 since RSTR_FP_ERR_PTRS support was introduced
> just recently.

And already release-acked by Jürgen.

Jan

> --- a/xen/tools/gen-cpuid.py
> +++ b/xen/tools/gen-cpuid.py
> @@ -168,8 +168,9 @@ def crunch_numbers(state):
>      deps = {
>          # FPU is taken to mean support for the x87 regisers as well as the
>          # instructions.  MMX is documented to alias the %MM registers over the
> -        # x87 %ST registers in hardware.
> -        FPU: [MMX],
> +        # x87 %ST registers in hardware.  Correct restoring of error pointers
> +        # of course makes no sense without there being anything to restore.
> +        FPU: [MMX, RSTR_FP_ERR_PTRS],
>  
>          # The PSE36 feature indicates that reserved bits in a PSE superpage
>          # may be used as extra physical address bits.
Andrew Cooper Dec. 6, 2019, 6:48 p.m. UTC | #3
On 08/10/2019 10:32, Jan Beulich wrote:
> On 25.09.2019 17:27, Jan Beulich wrote:
>> There's nothing to restore here if there's no FPU in the first place.
>>
>> Signed-off-by: Jan Beulich <jbeulich@suse.com>
>> ---
>> To be considered for 4.13 since RSTR_FP_ERR_PTRS support was introduced
>> just recently.
> And already release-acked by Jürgen.

Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
Jan Beulich Dec. 9, 2019, 1:06 p.m. UTC | #4
On 26.09.2019 17:23, Jürgen Groß wrote:
> On 25.09.19 17:27, Jan Beulich wrote:
>> There's nothing to restore here if there's no FPU in the first place.
>>
>> Signed-off-by: Jan Beulich <jbeulich@suse.com>
> 
> Release-acked-by: Juergen Gross <jgross@suse.com>

While I've committed the change to the unstable branch, making use of
this R-a-b now without asking would seem abusive to me. I'd expect
you don't want the 4.13 branch disturbed more than really helpful,
and hence I expect you'd rather not see this go in there now. Please
let me know if you view this differently.

Jan
Jürgen Groß Dec. 9, 2019, 2 p.m. UTC | #5
On 09.12.19 14:06, Jan Beulich wrote:
> On 26.09.2019 17:23, Jürgen Groß wrote:
>> On 25.09.19 17:27, Jan Beulich wrote:
>>> There's nothing to restore here if there's no FPU in the first place.
>>>
>>> Signed-off-by: Jan Beulich <jbeulich@suse.com>
>>
>> Release-acked-by: Juergen Gross <jgross@suse.com>
> 
> While I've committed the change to the unstable branch, making use of
> this R-a-b now without asking would seem abusive to me. I'd expect
> you don't want the 4.13 branch disturbed more than really helpful,
> and hence I expect you'd rather not see this go in there now. Please
> let me know if you view this differently.

I appreciate that a lot. Please don't commit this to 4.13 now. :-)


Juergen
diff mbox series

Patch

--- a/xen/tools/gen-cpuid.py
+++ b/xen/tools/gen-cpuid.py
@@ -168,8 +168,9 @@  def crunch_numbers(state):
     deps = {
         # FPU is taken to mean support for the x87 regisers as well as the
         # instructions.  MMX is documented to alias the %MM registers over the
-        # x87 %ST registers in hardware.
-        FPU: [MMX],
+        # x87 %ST registers in hardware.  Correct restoring of error pointers
+        # of course makes no sense without there being anything to restore.
+        FPU: [MMX, RSTR_FP_ERR_PTRS],
 
         # The PSE36 feature indicates that reserved bits in a PSE superpage
         # may be used as extra physical address bits.