| Message ID | 20201227130407.10991-2-wsa+renesas@sang-engineering.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | v3u: add support for RAVB | expand |
Hi Wolfram, On Sun, Dec 27, 2020 at 2:06 PM Wolfram Sang <wsa+renesas@sang-engineering.com> wrote: > Document the compatible value for the RAVB block in the Renesas R-Car > V3U (R8A779A0) SoC. This variant has no stream buffer, so we only need > to add the new compatible. > > Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Thanks for your patch! > --- a/Documentation/devicetree/bindings/net/renesas,etheravb.yaml > +++ b/Documentation/devicetree/bindings/net/renesas,etheravb.yaml > @@ -40,6 +40,7 @@ properties: > - renesas,etheravb-r8a77980 # R-Car V3H > - renesas,etheravb-r8a77990 # R-Car E3 > - renesas,etheravb-r8a77995 # R-Car D3 > + - renesas,etheravb-r8a779a0 # R-Car V3U > - const: renesas,etheravb-rcar-gen3 # R-Car Gen3 and RZ/G2 > > reg: true EtherAVB on R-Car V3U does have the Tx clock internal Delay Mode bit in the APSR register, so its compatible value should be added to the list of SoCs where tx-internal-delay-ps is required. With that fixed: Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> The various Counter Registers starting at offset 0x700 are limited to 16-bit values, like on R-Car Gen2, while they support 32-bit values on other R-Car Gen3 variants. The driver uses only the Transmit Retry Over Counter Register (TROCR), for statistics, so we can just ignore that difference. V3U also has a new block of registers related to UDP/IP support (offset 0x800 and up). I guess we can just ignore them too, for now. Gr{oetje,eeting}s, Geert
On Sun, 27 Dec 2020 14:04:02 +0100, Wolfram Sang wrote: > Document the compatible value for the RAVB block in the Renesas R-Car > V3U (R8A779A0) SoC. This variant has no stream buffer, so we only need > to add the new compatible. > > Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> > --- > Documentation/devicetree/bindings/net/renesas,etheravb.yaml | 1 + > 1 file changed, 1 insertion(+) > Acked-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/net/renesas,etheravb.yaml b/Documentation/devicetree/bindings/net/renesas,etheravb.yaml index 244befb6402a..6e57e4f157f0 100644 --- a/Documentation/devicetree/bindings/net/renesas,etheravb.yaml +++ b/Documentation/devicetree/bindings/net/renesas,etheravb.yaml @@ -40,6 +40,7 @@ properties: - renesas,etheravb-r8a77980 # R-Car V3H - renesas,etheravb-r8a77990 # R-Car E3 - renesas,etheravb-r8a77995 # R-Car D3 + - renesas,etheravb-r8a779a0 # R-Car V3U - const: renesas,etheravb-rcar-gen3 # R-Car Gen3 and RZ/G2 reg: true
Document the compatible value for the RAVB block in the Renesas R-Car V3U (R8A779A0) SoC. This variant has no stream buffer, so we only need to add the new compatible. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> --- Documentation/devicetree/bindings/net/renesas,etheravb.yaml | 1 + 1 file changed, 1 insertion(+)