Message ID | 20210414155208.3161335-1-imre.deak@intel.com (mailing list archive) |
---|---|
Headers | show |
Series | drm/i915/adl_p: Add support for Display Page Tables | expand |
On Wed, 14 Apr 2021, Imre Deak <imre.deak@intel.com> wrote: > Alder Lake-P adds a new Display Page Table hardware structure, mapping > tiled framebuffer pages to the display engine, reducing the address > space required in GGTT for these framebuffers. > > This patchset adds support for this taking a minimum set of dependency > patches from the ADL_P enabling patchset at > https://patchwork.freedesktop.org/series/87897/ Cc: Daniel I guess we'll need a topic branch for the base enabling to merge to both din and dign? I guess it'll need to include the stuff in topic/intel-gen-to-ver too. Shared stuff like this keeps being a problem with the separate dign branch, especially when the only way to sync is to merge both din and dign to drm-next and then backmerge to both. BR, Jani. > > Clinton Taylor (2): > drm/i915/adl_p: Add PCI Devices IDs > drm/i915/adl_p: ADL_P device info enabling > > Imre Deak (4): > drm/i915: Pass intel_framebuffer instad of drm_framebuffer to > intel_fill_fb_info() > drm/i915/adl_p: Disable support for 90/270 FB rotation > drm/i915/adl_p: Require a minimum of 8 tiles stride for DPT FBs > drm/i915/adl_p: Enable remapping to pad DPT FB strides to POT > > José Roberto de Souza (2): > drm/i915/xelpd: Fallback to plane stride limitations when using DPT > drm/i915/adl_p: Add stride restriction when using DPT > > Juha-Pekka Heikkilä (1): > drm/i915/xelpd: Support 128k plane stride > > Matt Roper (1): > drm/i915/xelpd: add XE_LPD display characteristics > > Ville Syrjälä (1): > drm/i915/xelpd: First stab at DPT support > > arch/x86/kernel/early-quirks.c | 1 + > .../gpu/drm/i915/display/intel_atomic_plane.c | 7 +- > drivers/gpu/drm/i915/display/intel_display.c | 381 ++++++++++++++++-- > drivers/gpu/drm/i915/display/intel_display.h | 1 + > .../drm/i915/display/intel_display_types.h | 25 +- > drivers/gpu/drm/i915/display/intel_fb.c | 92 +++-- > drivers/gpu/drm/i915/display/intel_fb.h | 5 +- > drivers/gpu/drm/i915/display/intel_fbc.c | 6 +- > .../drm/i915/display/skl_universal_plane.c | 68 +++- > drivers/gpu/drm/i915/gt/gen8_ppgtt.h | 7 + > drivers/gpu/drm/i915/gt/intel_ggtt.c | 7 +- > drivers/gpu/drm/i915/gt/intel_gtt.h | 5 + > drivers/gpu/drm/i915/i915_drv.h | 1 + > drivers/gpu/drm/i915/i915_pci.c | 22 + > drivers/gpu/drm/i915/i915_reg.h | 2 + > drivers/gpu/drm/i915/intel_device_info.c | 1 + > drivers/gpu/drm/i915/intel_device_info.h | 1 + > include/drm/i915_pciids.h | 21 + > 18 files changed, 567 insertions(+), 86 deletions(-)
On Thu, 15 Apr 2021, Jani Nikula <jani.nikula@linux.intel.com> wrote: > On Wed, 14 Apr 2021, Imre Deak <imre.deak@intel.com> wrote: >> Alder Lake-P adds a new Display Page Table hardware structure, mapping >> tiled framebuffer pages to the display engine, reducing the address >> space required in GGTT for these framebuffers. >> >> This patchset adds support for this taking a minimum set of dependency >> patches from the ADL_P enabling patchset at >> https://patchwork.freedesktop.org/series/87897/ > > Cc: Daniel > > I guess we'll need a topic branch for the base enabling to merge to both > din and dign? I guess it'll need to include the stuff in > topic/intel-gen-to-ver too. > > Shared stuff like this keeps being a problem with the separate dign > branch, especially when the only way to sync is to merge both din and > dign to drm-next and then backmerge to both. I've created the topic branch. When this series starts getting ready to merge, please use the topic/adl-p-enabling branch, so we can merge it to both drm-intel-next and drm-intel-gt-next. BR, Jani.
On Wed, Apr 21, 2021 at 02:03:45PM +0300, Jani Nikula wrote: > On Thu, 15 Apr 2021, Jani Nikula <jani.nikula@linux.intel.com> wrote: > > On Wed, 14 Apr 2021, Imre Deak <imre.deak@intel.com> wrote: > >> Alder Lake-P adds a new Display Page Table hardware structure, mapping > >> tiled framebuffer pages to the display engine, reducing the address > >> space required in GGTT for these framebuffers. > >> > >> This patchset adds support for this taking a minimum set of dependency > >> patches from the ADL_P enabling patchset at > >> https://patchwork.freedesktop.org/series/87897/ > > > > Cc: Daniel > > > > I guess we'll need a topic branch for the base enabling to merge to both > > din and dign? I guess it'll need to include the stuff in > > topic/intel-gen-to-ver too. > > > > Shared stuff like this keeps being a problem with the separate dign > > branch, especially when the only way to sync is to merge both din and > > dign to drm-next and then backmerge to both. > > I've created the topic branch. > > When this series starts getting ready to merge, please use the > topic/adl-p-enabling branch, so we can merge it to both drm-intel-next > and drm-intel-gt-next. Ok, thanks, I would need a review for 4 (trivial) patches in the patchset. Could you explain the reason for a separate branch? > BR, > Jani. > -- > Jani Nikula, Intel Open Source Graphics Center
On Wed, 21 Apr 2021, Imre Deak <imre.deak@intel.com> wrote: > On Wed, Apr 21, 2021 at 02:03:45PM +0300, Jani Nikula wrote: >> On Thu, 15 Apr 2021, Jani Nikula <jani.nikula@linux.intel.com> wrote: >> > On Wed, 14 Apr 2021, Imre Deak <imre.deak@intel.com> wrote: >> >> Alder Lake-P adds a new Display Page Table hardware structure, mapping >> >> tiled framebuffer pages to the display engine, reducing the address >> >> space required in GGTT for these framebuffers. >> >> >> >> This patchset adds support for this taking a minimum set of dependency >> >> patches from the ADL_P enabling patchset at >> >> https://patchwork.freedesktop.org/series/87897/ >> > >> > Cc: Daniel >> > >> > I guess we'll need a topic branch for the base enabling to merge to both >> > din and dign? I guess it'll need to include the stuff in >> > topic/intel-gen-to-ver too. >> > >> > Shared stuff like this keeps being a problem with the separate dign >> > branch, especially when the only way to sync is to merge both din and >> > dign to drm-next and then backmerge to both. >> >> I've created the topic branch. >> >> When this series starts getting ready to merge, please use the >> topic/adl-p-enabling branch, so we can merge it to both drm-intel-next >> and drm-intel-gt-next. > > Ok, thanks, I would need a review for 4 (trivial) patches in the > patchset. Could you explain the reason for a separate branch? drm-intel-next and drm-intel-gt-next only get synced via merges to drm-next, and backmerges back to each branch. If adl-p basic enabling patches (PCI IDs, device info, etc.) only get merged to drm-intel-next, any gt enabling in drm-intel-gt-next will be pending on the merge + backmerge, which will be some time after the next merge window. At least three weeks away. Additionally accumulating merge conflicts. With the topic branch, we can merge the basics to both right away, and continue with details in each branch separately. BR, Jani.
On Wed, Apr 21, 2021 at 03:12:48PM +0300, Jani Nikula wrote: > On Wed, 21 Apr 2021, Imre Deak <imre.deak@intel.com> wrote: > > On Wed, Apr 21, 2021 at 02:03:45PM +0300, Jani Nikula wrote: > >> On Thu, 15 Apr 2021, Jani Nikula <jani.nikula@linux.intel.com> wrote: > >> > On Wed, 14 Apr 2021, Imre Deak <imre.deak@intel.com> wrote: > >> >> Alder Lake-P adds a new Display Page Table hardware structure, mapping > >> >> tiled framebuffer pages to the display engine, reducing the address > >> >> space required in GGTT for these framebuffers. > >> >> > >> >> This patchset adds support for this taking a minimum set of dependency > >> >> patches from the ADL_P enabling patchset at > >> >> https://patchwork.freedesktop.org/series/87897/ > >> > > >> > Cc: Daniel > >> > > >> > I guess we'll need a topic branch for the base enabling to merge to both > >> > din and dign? I guess it'll need to include the stuff in > >> > topic/intel-gen-to-ver too. > >> > > >> > Shared stuff like this keeps being a problem with the separate dign > >> > branch, especially when the only way to sync is to merge both din and > >> > dign to drm-next and then backmerge to both. > >> > >> I've created the topic branch. > >> > >> When this series starts getting ready to merge, please use the > >> topic/adl-p-enabling branch, so we can merge it to both drm-intel-next > >> and drm-intel-gt-next. > > > > Ok, thanks, I would need a review for 4 (trivial) patches in the > > patchset. Could you explain the reason for a separate branch? > > drm-intel-next and drm-intel-gt-next only get synced via merges to > drm-next, and backmerges back to each branch. If adl-p basic enabling > patches (PCI IDs, device info, etc.) only get merged to drm-intel-next, > any gt enabling in drm-intel-gt-next will be pending on the merge + > backmerge, which will be some time after the next merge window. At least > three weeks away. Additionally accumulating merge conflicts. > > With the topic branch, we can merge the basics to both right away, and > continue with details in each branch separately. Makes sense, thanks for explaining. > > BR, > Jani. > > > -- > Jani Nikula, Intel Open Source Graphics Center