| Message ID | 20211230123539.52786-17-anup@brainfault.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | QEMU RISC-V AIA support | expand |
Anup Patel <anup@brainfault.org> 於 2021年12月30日 週四 下午8:59寫道： > From: Anup Patel <anup.patel@wdc.com> > > We should use the AIA INTC compatible string in the CPU INTC > DT nodes when the CPUs support AIA feature. This will allow > Linux INTC driver to use AIA local interrupt CSRs. > > Signed-off-by: Anup Patel <anup.patel@wdc.com> > Signed-off-by: Anup Patel <anup@brainfault.org> > Reviewed-by: Alistair Francis <alistair.francis@wdc.com> > --- > hw/riscv/virt.c | 13 +++++++++++-- > 1 file changed, 11 insertions(+), 2 deletions(-) > > diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c > index 3af074148e..720641b1dd 100644 > --- a/hw/riscv/virt.c > +++ b/hw/riscv/virt.c > @@ -211,8 +211,17 @@ static void create_fdt_socket_cpus(RISCVVirtState *s, > int socket, > qemu_fdt_add_subnode(mc->fdt, intc_name); > qemu_fdt_setprop_cell(mc->fdt, intc_name, "phandle", > intc_phandles[cpu]); > - qemu_fdt_setprop_string(mc->fdt, intc_name, "compatible", > - "riscv,cpu-intc"); > + if (riscv_feature(&s->soc[socket].harts[cpu].env, > + RISCV_FEATURE_AIA)) { > + static const char * const compat[2] = { > + "riscv,cpu-intc-aia", "riscv,cpu-intc" > + }; > + qemu_fdt_setprop_string_array(mc->fdt, intc_name, > "compatible", > + (char **)&compat, > ARRAY_SIZE(compat)); > + } else { > + qemu_fdt_setprop_string(mc->fdt, intc_name, "compatible", > + "riscv,cpu-intc"); > + } > qemu_fdt_setprop(mc->fdt, intc_name, "interrupt-controller", > NULL, 0); > qemu_fdt_setprop_cell(mc->fdt, intc_name, "#interrupt-cells", 1); > > -- > 2.25.1 > > > Reviewed-by: Frank Chang <frank.chang@sifive.com>
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 3af074148e..720641b1dd 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -211,8 +211,17 @@ static void create_fdt_socket_cpus(RISCVVirtState *s, int socket, qemu_fdt_add_subnode(mc->fdt, intc_name); qemu_fdt_setprop_cell(mc->fdt, intc_name, "phandle", intc_phandles[cpu]); - qemu_fdt_setprop_string(mc->fdt, intc_name, "compatible", - "riscv,cpu-intc"); + if (riscv_feature(&s->soc[socket].harts[cpu].env, + RISCV_FEATURE_AIA)) { + static const char * const compat[2] = { + "riscv,cpu-intc-aia", "riscv,cpu-intc" + }; + qemu_fdt_setprop_string_array(mc->fdt, intc_name, "compatible", + (char **)&compat, ARRAY_SIZE(compat)); + } else { + qemu_fdt_setprop_string(mc->fdt, intc_name, "compatible", + "riscv,cpu-intc"); + } qemu_fdt_setprop(mc->fdt, intc_name, "interrupt-controller", NULL, 0); qemu_fdt_setprop_cell(mc->fdt, intc_name, "#interrupt-cells", 1);