Message ID | 1658223939-25478-3-git-send-email-hongxing.zhu@nxp.com (mailing list archive) |
---|---|
State | Superseded |
Delegated to: | Lorenzo Pieralisi |
Headers | show |
Series | Add iMX PCIe EP mode support | expand |
On Tue, 19 Jul 2022 17:45:31 +0800, Richard Zhu wrote: > Add i.MX8MQ PCIe endpoint mode compatible string. > > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> > --- > Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 1 + > 1 file changed, 1 insertion(+) > Acked-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml index d52c6396fe11..85b7c1663054 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml @@ -28,6 +28,7 @@ properties: - fsl,imx8mm-pcie - fsl,imx8mp-pcie - fsl,imx8mm-pcie-ep + - fsl,imx8mq-pcie-ep reg: items:
Add i.MX8MQ PCIe endpoint mode compatible string. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> --- Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 1 + 1 file changed, 1 insertion(+)