| Message ID | 7bb4858c-5cef-9cae-5e08-7e8444e8ba89@gmail.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 639c26faf9b15922bc620af341545d6c5d6aab2d |
| Delegated to: | Kalle Valo |
| Headers | show |
| Series | [1/2] wifi: rtl8xxxu: Fix assignment to bit field priv->pi_enabled | expand |
> -----Original Message----- > From: Bitterblue Smith <rtl8821cerfe2@gmail.com> > Sent: Friday, December 9, 2022 3:34 AM > To: linux-wireless@vger.kernel.org > Cc: Jes Sorensen <Jes.Sorensen@gmail.com>; Ping-Ke Shih <pkshih@realtek.com> > Subject: [PATCH 2/2] wifi: rtl8xxxu: Fix assignment to bit field priv->cck_agc_report_type > > Just because priv->cck_agc_report_type is only one bit doesn't mean > it works like a bool. The value assigned to it loses all bits except > bit 0, so only assign 0 or 1 to it. > > This affects the RTL8192EU, but rtl8xxxu already can't connect to any > networks with this chip, so it probably didn't bother anyone. > > Fixes: 2ad2a813b803 ("wifi: rtl8xxxu: Fix the CCK RSSI calculation") > Signed-off-by: Bitterblue Smith <rtl8821cerfe2@gmail.com> Reviewed-by: Ping-Ke Shih <pkshih@realtek.com> > --- > drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c > b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c > index 3ed435401e57..799b03ec1980 100644 > --- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c > +++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c > @@ -4208,10 +4208,12 @@ static int rtl8xxxu_init_device(struct ieee80211_hw *hw) > * should be equal or CCK RSSI report may be incorrect > */ > val32 = rtl8xxxu_read32(priv, REG_FPGA0_XA_HSSI_PARM2); > - priv->cck_agc_report_type = val32 & FPGA0_HSSI_PARM2_CCK_HIGH_PWR; > + priv->cck_agc_report_type = > + u32_get_bits(val32, FPGA0_HSSI_PARM2_CCK_HIGH_PWR); > > val32 = rtl8xxxu_read32(priv, REG_FPGA0_XB_HSSI_PARM2); > - if (priv->cck_agc_report_type != (bool)(val32 & FPGA0_HSSI_PARM2_CCK_HIGH_PWR)) { > + if (priv->cck_agc_report_type != > + u32_get_bits(val32, FPGA0_HSSI_PARM2_CCK_HIGH_PWR)) { > if (priv->cck_agc_report_type) > val32 |= FPGA0_HSSI_PARM2_CCK_HIGH_PWR; > else > -- > 2.38.0 > > ------Please consider the environment before printing this e-mail.
diff --git a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c index 3ed435401e57..799b03ec1980 100644 --- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c +++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c @@ -4208,10 +4208,12 @@ static int rtl8xxxu_init_device(struct ieee80211_hw *hw) * should be equal or CCK RSSI report may be incorrect */ val32 = rtl8xxxu_read32(priv, REG_FPGA0_XA_HSSI_PARM2); - priv->cck_agc_report_type = val32 & FPGA0_HSSI_PARM2_CCK_HIGH_PWR; + priv->cck_agc_report_type = + u32_get_bits(val32, FPGA0_HSSI_PARM2_CCK_HIGH_PWR); val32 = rtl8xxxu_read32(priv, REG_FPGA0_XB_HSSI_PARM2); - if (priv->cck_agc_report_type != (bool)(val32 & FPGA0_HSSI_PARM2_CCK_HIGH_PWR)) { + if (priv->cck_agc_report_type != + u32_get_bits(val32, FPGA0_HSSI_PARM2_CCK_HIGH_PWR)) { if (priv->cck_agc_report_type) val32 |= FPGA0_HSSI_PARM2_CCK_HIGH_PWR; else
Just because priv->cck_agc_report_type is only one bit doesn't mean it works like a bool. The value assigned to it loses all bits except bit 0, so only assign 0 or 1 to it. This affects the RTL8192EU, but rtl8xxxu already can't connect to any networks with this chip, so it probably didn't bother anyone. Fixes: 2ad2a813b803 ("wifi: rtl8xxxu: Fix the CCK RSSI calculation") Signed-off-by: Bitterblue Smith <rtl8821cerfe2@gmail.com> --- drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)