| Message ID | 20230914192659.757475-24-imre.deak@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915: Improve BW management on shared display links | expand |
On Thu, Sep 14, 2023 at 10:26:57PM +0300, Imre Deak wrote: > Atm the driver supports DSC on MST links only by enabling it globally in > the first branch device UFP's physical DPCD (vs. enabling it per-stream > in the virtual DPCD right upstream the DPRX). This means the branch > device will decompress any compressed stream (which it recognizes via > MSA / SDP compression info), but it does this only for streams going to > an SST output port. Accordingly allow DSC only for streams going to an > SST output port of the first branch device. > > Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> > --- > drivers/gpu/drm/i915/display/intel_dp_mst.c | 26 +++++++++++++++++++++ > 1 file changed, 26 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c > index b2ac29a157fbd..f24f656d6d02a 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c > @@ -335,6 +335,27 @@ intel_dp_mst_compute_config_limits(struct intel_dp *intel_dp, > limits); > } > > +static bool intel_dp_mst_port_supports_dsc(struct intel_dp *intel_dp, > + struct intel_crtc_state *crtc_state, > + struct drm_connector_state *conn_state) > +{ > + struct drm_i915_private *i915 = dp_to_i915(intel_dp); > + struct intel_connector *connector = > + to_intel_connector(conn_state->connector); > + struct intel_crtc *crtc = > + to_intel_crtc(crtc_state->uapi.crtc); > + > + if (connector->port->parent != intel_dp->mst_mgr.mst_primary) { > + drm_dbg_kms(&i915->drm, > + "[CRTC:%d:%s] DSC only allowed on sink ports of the first branch device\n", > + crtc->base.base.id, crtc->base.name); > + > + return false; > + } > + > + return true; > +} > + > static int intel_dp_mst_compute_config(struct intel_encoder *encoder, > struct intel_crtc_state *pipe_config, > struct drm_connector_state *conn_state) > @@ -378,6 +399,11 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder, > str_yes_no(ret), > str_yes_no(intel_dp->force_dsc_en)); > > + if (!intel_dp_mst_port_supports_dsc(intel_dp, > + pipe_config, > + conn_state)) > + return -EINVAL; > + > if (!intel_dp_mst_compute_config_limits(intel_dp, > pipe_config, > true, > -- > 2.37.2 >
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index b2ac29a157fbd..f24f656d6d02a 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -335,6 +335,27 @@ intel_dp_mst_compute_config_limits(struct intel_dp *intel_dp, limits); } +static bool intel_dp_mst_port_supports_dsc(struct intel_dp *intel_dp, + struct intel_crtc_state *crtc_state, + struct drm_connector_state *conn_state) +{ + struct drm_i915_private *i915 = dp_to_i915(intel_dp); + struct intel_connector *connector = + to_intel_connector(conn_state->connector); + struct intel_crtc *crtc = + to_intel_crtc(crtc_state->uapi.crtc); + + if (connector->port->parent != intel_dp->mst_mgr.mst_primary) { + drm_dbg_kms(&i915->drm, + "[CRTC:%d:%s] DSC only allowed on sink ports of the first branch device\n", + crtc->base.base.id, crtc->base.name); + + return false; + } + + return true; +} + static int intel_dp_mst_compute_config(struct intel_encoder *encoder, struct intel_crtc_state *pipe_config, struct drm_connector_state *conn_state) @@ -378,6 +399,11 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder, str_yes_no(ret), str_yes_no(intel_dp->force_dsc_en)); + if (!intel_dp_mst_port_supports_dsc(intel_dp, + pipe_config, + conn_state)) + return -EINVAL; + if (!intel_dp_mst_compute_config_limits(intel_dp, pipe_config, true,
Atm the driver supports DSC on MST links only by enabling it globally in the first branch device UFP's physical DPCD (vs. enabling it per-stream in the virtual DPCD right upstream the DPRX). This means the branch device will decompress any compressed stream (which it recognizes via MSA / SDP compression info), but it does this only for streams going to an SST output port. Accordingly allow DSC only for streams going to an SST output port of the first branch device. Signed-off-by: Imre Deak <imre.deak@intel.com> --- drivers/gpu/drm/i915/display/intel_dp_mst.c | 26 +++++++++++++++++++++ 1 file changed, 26 insertions(+)