| Message ID | 20240305-praying-clad-c4fbcaa7ed0a@spud (mailing list archive) |
|---|---|
| State | Accepted |
| Headers | show |
| Series | [v1,1/2] RISC-V: drop SOC_SIFIVE for ARCH_SIFIVE | expand |
On 2024-03-05 12:37 PM, Conor Dooley wrote: > From: Conor Dooley <conor.dooley@microchip.com> > > All the users in the kernel are gone and generated .config files from > previous LTS kernels will contain ARCH_SIFIVE. Drop SOC_SIFIVE and > update the defconfig. > > Signed-off-by: Conor Dooley <conor.dooley@microchip.com> > --- > CC: Paul Walmsley <paul.walmsley@sifive.com> > CC: Palmer Dabbelt <palmer@dabbelt.com> > CC: Albert Ou <aou@eecs.berkeley.edu> > CC: linux-riscv@lists.infradead.org > CC: linux-kernel@vger.kernel.org > --- > arch/riscv/Kconfig.socs | 3 --- > arch/riscv/configs/defconfig | 2 +- > 2 files changed, 1 insertion(+), 4 deletions(-) Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
On Tue, 05 Mar 2024 10:37:05 PST (-0800), Conor Dooley wrote: > From: Conor Dooley <conor.dooley@microchip.com> > > All the users in the kernel are gone and generated .config files from > previous LTS kernels will contain ARCH_SIFIVE. Drop SOC_SIFIVE and > update the defconfig. > > Signed-off-by: Conor Dooley <conor.dooley@microchip.com> > --- > CC: Paul Walmsley <paul.walmsley@sifive.com> > CC: Palmer Dabbelt <palmer@dabbelt.com> > CC: Albert Ou <aou@eecs.berkeley.edu> > CC: linux-riscv@lists.infradead.org > CC: linux-kernel@vger.kernel.org > --- > arch/riscv/Kconfig.socs | 3 --- > arch/riscv/configs/defconfig | 2 +- > 2 files changed, 1 insertion(+), 4 deletions(-) > > diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs > index e08e91c49abe..e85ffb63c48d 100644 > --- a/arch/riscv/Kconfig.socs > +++ b/arch/riscv/Kconfig.socs > @@ -14,9 +14,6 @@ config ARCH_RENESAS > This enables support for the RISC-V based Renesas SoCs. > > config ARCH_SIFIVE > - def_bool SOC_SIFIVE > - > -config SOC_SIFIVE > bool "SiFive SoCs" > select ERRATA_SIFIVE if !XIP_KERNEL > help > diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig > index 89a009a580fe..ab3bab313d56 100644 > --- a/arch/riscv/configs/defconfig > +++ b/arch/riscv/configs/defconfig > @@ -27,7 +27,7 @@ CONFIG_EXPERT=y > CONFIG_PROFILING=y > CONFIG_SOC_MICROCHIP_POLARFIRE=y > CONFIG_ARCH_RENESAS=y > -CONFIG_SOC_SIFIVE=y > +CONFIG_ARCH_SIFIVE=y > CONFIG_ARCH_SOPHGO=y > CONFIG_SOC_STARFIVE=y > CONFIG_ARCH_SUNXI=y Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
From: Conor Dooley <conor.dooley@microchip.com> On Tue, 05 Mar 2024 18:37:05 +0000, Conor Dooley wrote: > All the users in the kernel are gone and generated .config files from > previous LTS kernels will contain ARCH_SIFIVE. Drop SOC_SIFIVE and > update the defconfig. > > Applied to riscv-soc-for-next, thanks! [1/2] RISC-V: drop SOC_SIFIVE for ARCH_SIFIVE https://git.kernel.org/conor/c/d2a351e63779 [2/2] RISC-V: drop SOC_VIRT for ARCH_VIRT https://git.kernel.org/conor/c/1553a1c48281 Thanks, Conor.
diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs index e08e91c49abe..e85ffb63c48d 100644 --- a/arch/riscv/Kconfig.socs +++ b/arch/riscv/Kconfig.socs @@ -14,9 +14,6 @@ config ARCH_RENESAS This enables support for the RISC-V based Renesas SoCs. config ARCH_SIFIVE - def_bool SOC_SIFIVE - -config SOC_SIFIVE bool "SiFive SoCs" select ERRATA_SIFIVE if !XIP_KERNEL help diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig index 89a009a580fe..ab3bab313d56 100644 --- a/arch/riscv/configs/defconfig +++ b/arch/riscv/configs/defconfig @@ -27,7 +27,7 @@ CONFIG_EXPERT=y CONFIG_PROFILING=y CONFIG_SOC_MICROCHIP_POLARFIRE=y CONFIG_ARCH_RENESAS=y -CONFIG_SOC_SIFIVE=y +CONFIG_ARCH_SIFIVE=y CONFIG_ARCH_SOPHGO=y CONFIG_SOC_STARFIVE=y CONFIG_ARCH_SUNXI=y