Message ID | 20190617073252.27810-69-jagan@amarulasolutions.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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bh=YPTBQZOeQmGhkN9z1YFaXG9uLnxmKsFQmtWC+Mse/M8=; b=GsrT1oAUT1b4xWQcfWfQ/z5z3S8uqT7je1qD+Cze84nvX+AGTy5c0dJ1JZ3JN+FIya 1YKDnufeONTnuiCqOc1ln0zPwx+q4jfif2StIVLtqfvgYs0QcDa+PgnCp7CuuT+42N7V G0WvQqs8f7LERxvCuVT7uHCRhA/pfPze7dZzU0++ZmzBItYfiaRVloOziBEMXHpczK/K x7MvNz0YOnkta5w5odAUy7tXuizUbHv594IKKOCGJcFpGnZtEu0PKldlOZkaVMa4iUx2 33h8r8SKtC1rlGUy5lHS0veV3IWHmmpgs7Kik48tIXCi0SHj9AwYRqf6wOjCgy2ZHejh 2lvg== X-Gm-Message-State: APjAAAWYlycjNlU5h+fyGM/wIqniFOtwTUZ2TwDGCJv+r94xhHNkJirG 4OoFIxq5vvBOI/IRI1rtLTHOWQ== X-Google-Smtp-Source: APXvYqyvnFm0hiGwz2wIXMpyPgH747CMwqRooOebgyXlK8Bo/xq8+xCj/SXU6ylwYFiwx8fuk5LtXw== X-Received: by 2002:a17:902:29a7:: with SMTP id h36mr55287395plb.158.1560757207411; Mon, 17 Jun 2019 00:40:07 -0700 (PDT) Received: from localhost.localdomain ([49.206.203.245]) by smtp.gmail.com with ESMTPSA id m41sm15205998pje.18.2019.06.17.00.40.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 17 Jun 2019 00:40:06 -0700 (PDT) From: Jagan Teki <jagan@amarulasolutions.com> To: Simon Glass <sjg@chromium.org>, Philipp Tomsich <philipp.tomsich@theobroma-systems.com>, Kever Yang <kever.yang@rock-chips.com>, YouMin Chen <cym@rock-chips.com>, u-boot@lists.denx.de Subject: [PATCH v2 68/99] ram: rk3399: Configure PHY RX_CM_INPUT for lpddr4 Date: Mon, 17 Jun 2019 13:02:21 +0530 Message-Id: <20190617073252.27810-69-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190617073252.27810-1-jagan@amarulasolutions.com> References: <20190617073252.27810-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190617_004008_243866_AC707F54 X-CRM114-Status: GOOD ( 10.77 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Upstream kernel work for Rockchip platforms <linux-rockchip.lists.infradead.org> List-Unsubscribe: <http://lists.infradead.org/mailman/options/linux-rockchip>, <mailto:linux-rockchip-request@lists.infradead.org?subject=unsubscribe> List-Archive: <http://lists.infradead.org/pipermail/linux-rockchip/> List-Post: <mailto:linux-rockchip@lists.infradead.org> List-Help: <mailto:linux-rockchip-request@lists.infradead.org?subject=help> List-Subscribe: <http://lists.infradead.org/mailman/listinfo/linux-rockchip>, <mailto:linux-rockchip-request@lists.infradead.org?subject=subscribe> Cc: linux-rockchip@lists.infradead.org, gajjar04akash@gmail.com, linux-amarula@amarulasolutions.com, Jagan Teki <jagan@amarulasolutions.com>, Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-rockchip" <linux-rockchip-bounces@lists.infradead.org> Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP |
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ram: rk3399: Add LPDDR4 support
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diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c index 1d2c2385f1..ae227b958f 100644 --- a/drivers/ram/rockchip/sdram_rk3399.c +++ b/drivers/ram/rockchip/sdram_rk3399.c @@ -39,6 +39,7 @@ #define PHY_BOOSTN_EN 0x1 #define PHY_SLEWP_EN 0x1 #define PHY_SLEWN_EN 0x1 +#define PHY_RX_CM_INPUT 0x1 #define CRU_SFTRST_DDR_CTRL(ch, n) ((0x1 << (8 + 16 + (ch) * 4)) | \ ((n) << (8 + (ch) * 4))) @@ -384,6 +385,27 @@ static int phy_io_config(const struct chan_info *chan, /* PHY_939 PHY_PAD_CS_DRIVE */ clrsetbits_le32(&denali_phy[939], 0x3 << 17, speed << 17); + if (IS_ENABLED(CONFIG_RAM_RK3399_LPDDR4)) { + /* RX_CM_INPUT */ + reg_value = PHY_RX_CM_INPUT; + /* PHY_924 PHY_PAD_FDBK_DRIVE */ + clrsetbits_le32(&denali_phy[924], 0x1 << 14, reg_value << 14); + /* PHY_926 PHY_PAD_DATA_DRIVE */ + clrsetbits_le32(&denali_phy[926], 0x1 << 11, reg_value << 11); + /* PHY_927 PHY_PAD_DQS_DRIVE */ + clrsetbits_le32(&denali_phy[927], 0x1 << 13, reg_value << 13); + /* PHY_928 PHY_PAD_ADDR_DRIVE */ + clrsetbits_le32(&denali_phy[928], 0x1 << 19, reg_value << 19); + /* PHY_929 PHY_PAD_CLK_DRIVE */ + clrsetbits_le32(&denali_phy[929], 0x1 << 21, reg_value << 21); + /* PHY_935 PHY_PAD_CKE_DRIVE */ + clrsetbits_le32(&denali_phy[935], 0x1 << 19, reg_value << 19); + /* PHY_937 PHY_PAD_RST_DRIVE */ + clrsetbits_le32(&denali_phy[937], 0x1 << 19, reg_value << 19); + /* PHY_939 PHY_PAD_CS_DRIVE */ + clrsetbits_le32(&denali_phy[939], 0x1 << 19, reg_value << 19); + } + return 0; }