| Message ID | 20240130111130.3298779-4-jouni.hogander@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | ALPM AUX Wake Configuration | expand |
> -----Original Message----- > From: Hogander, Jouni <jouni.hogander@intel.com> > Sent: Tuesday, January 30, 2024 4:41 PM > To: intel-gfx@lists.freedesktop.org > Cc: Murthy, Arun R <arun.r.murthy@intel.com>; Hogander, Jouni > <jouni.hogander@intel.com> > Subject: [PATCH v3 3/4] drm/i915/alpm: Calculate ALPM Entry check > > ALPM Entry Check represents the number of lines needed to put the main link > to sleep and keep it in the sleep state before it can be taken out of the SLEEP > state (eDP requires the main link to be in the SLEEP state for a minimum of > 5us). > > Bspec: 71477 > > v2: move display version check into _lnl_compute_alpm_param > > Signed-off-by: Jouni Högander <jouni.hogander@intel.com> > --- Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com> Thanks and Regards, Arun R Murthy ------------------- > .../drm/i915/display/intel_display_types.h | 3 ++ > drivers/gpu/drm/i915/display/intel_psr.c | 29 +++++++++++++++++++ > 2 files changed, 32 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h > b/drivers/gpu/drm/i915/display/intel_display_types.h > index ff6cd30b2b76..9fa42a4503fe 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_types.h > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h > @@ -1714,6 +1714,9 @@ struct intel_psr { > struct { > u8 io_wake_lines; > u8 fast_wake_lines; > + > + /* LNL and beyond */ > + u8 check_entry_lines; > } alpm_parameters; > > ktime_t last_entry_attempt; > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c > b/drivers/gpu/drm/i915/display/intel_psr.c > index 4bca1107997f..7aedda0ca2d2 100644 > --- a/drivers/gpu/drm/i915/display/intel_psr.c > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > @@ -1126,6 +1126,30 @@ static bool > _compute_psr2_sdp_prior_scanline_indication(struct intel_dp *intel_d > return true; > } > > +static bool _lnl_compute_alpm_params(struct intel_dp *intel_dp, > + struct intel_crtc_state *crtc_state) { > + struct drm_i915_private *i915 = dp_to_i915(intel_dp); > + int check_entry_lines; > + > + if (DISPLAY_VER(i915) < 20) > + return true; > + > + /* ALPM Entry Check = 2 + CEILING( 5us /tline ) */ > + check_entry_lines = 2 + > + intel_usecs_to_scanlines(&crtc_state->hw.adjusted_mode, 5); > + > + if (check_entry_lines > 15) > + return false; > + > + if (i915->display.params.psr_safest_params) > + check_entry_lines = 15; > + > + intel_dp->psr.alpm_parameters.check_entry_lines = check_entry_lines; > + > + return true; > +} > + > static bool _compute_alpm_params(struct intel_dp *intel_dp, > struct intel_crtc_state *crtc_state) { @@ - > 1140,6 +1164,8 @@ static bool _compute_alpm_params(struct intel_dp > *intel_dp, > * it is not enough -> use 45 us. > */ > fast_wake_time = 45; > + > + /* TODO: Check how we can use ALPM_CTL fast wake extended > field */ > max_wake_lines = 12; > } else { > io_wake_time = 50; > @@ -1156,6 +1182,9 @@ static bool _compute_alpm_params(struct intel_dp > *intel_dp, > fast_wake_lines > max_wake_lines) > return false; > > + if (!_lnl_compute_alpm_params(intel_dp, crtc_state)) > + return false; > + > if (i915->display.params.psr_safest_params) > io_wake_lines = fast_wake_lines = max_wake_lines; > > -- > 2.34.1
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index ff6cd30b2b76..9fa42a4503fe 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -1714,6 +1714,9 @@ struct intel_psr { struct { u8 io_wake_lines; u8 fast_wake_lines; + + /* LNL and beyond */ + u8 check_entry_lines; } alpm_parameters; ktime_t last_entry_attempt; diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 4bca1107997f..7aedda0ca2d2 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -1126,6 +1126,30 @@ static bool _compute_psr2_sdp_prior_scanline_indication(struct intel_dp *intel_d return true; } +static bool _lnl_compute_alpm_params(struct intel_dp *intel_dp, + struct intel_crtc_state *crtc_state) +{ + struct drm_i915_private *i915 = dp_to_i915(intel_dp); + int check_entry_lines; + + if (DISPLAY_VER(i915) < 20) + return true; + + /* ALPM Entry Check = 2 + CEILING( 5us /tline ) */ + check_entry_lines = 2 + + intel_usecs_to_scanlines(&crtc_state->hw.adjusted_mode, 5); + + if (check_entry_lines > 15) + return false; + + if (i915->display.params.psr_safest_params) + check_entry_lines = 15; + + intel_dp->psr.alpm_parameters.check_entry_lines = check_entry_lines; + + return true; +} + static bool _compute_alpm_params(struct intel_dp *intel_dp, struct intel_crtc_state *crtc_state) { @@ -1140,6 +1164,8 @@ static bool _compute_alpm_params(struct intel_dp *intel_dp, * it is not enough -> use 45 us. */ fast_wake_time = 45; + + /* TODO: Check how we can use ALPM_CTL fast wake extended field */ max_wake_lines = 12; } else { io_wake_time = 50; @@ -1156,6 +1182,9 @@ static bool _compute_alpm_params(struct intel_dp *intel_dp, fast_wake_lines > max_wake_lines) return false; + if (!_lnl_compute_alpm_params(intel_dp, crtc_state)) + return false; + if (i915->display.params.psr_safest_params) io_wake_lines = fast_wake_lines = max_wake_lines;
ALPM Entry Check represents the number of lines needed to put the main link to sleep and keep it in the sleep state before it can be taken out of the SLEEP state (eDP requires the main link to be in the SLEEP state for a minimum of 5us). Bspec: 71477 v2: move display version check into _lnl_compute_alpm_param Signed-off-by: Jouni Högander <jouni.hogander@intel.com> --- .../drm/i915/display/intel_display_types.h | 3 ++ drivers/gpu/drm/i915/display/intel_psr.c | 29 +++++++++++++++++++ 2 files changed, 32 insertions(+)