diff mbox series

[v1,29/50] ARM: dts: exynos: align OPPs of bus_gen in Exynos5420

Message ID 20190715124417.4787-30-l.luba@partner.samsung.com (mailing list archive)
State New, archived
Headers show
Series [v1,01/50] clk: samsung: add new IDs for Exynos5420 clocks | expand

Commit Message

Lukasz Luba July 15, 2019, 12:43 p.m. UTC 
Align the OPPs' frequencies to the master clock rate such that the values
are possible to set using only a clock divider. Set max OPP frequency equal
to the max possible for that bus (according to the documentation).

Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
---
 arch/arm/boot/dts/exynos5420.dtsi | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 3a128cd717e2..f2e2e77a86d6 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -1191,16 +1191,16 @@ 
 			compatible = "operating-points-v2";
 
 			opp00 {
-				opp-hz = /bits/ 64 <89000000>;
+				opp-hz = /bits/ 64 <100000000>;
 			};
 			opp01 {
-				opp-hz = /bits/ 64 <133000000>;
+				opp-hz = /bits/ 64 <150000000>;
 			};
 			opp02 {
-				opp-hz = /bits/ 64 <178000000>;
+				opp-hz = /bits/ 64 <200000000>;
 			};
 			opp03 {
-				opp-hz = /bits/ 64 <267000000>;
+				opp-hz = /bits/ 64 <300000000>;
 			};
 		};