| Message ID | 20240401153740.123978-9-krzk@kernel.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [RFT,01/10] arm64: dts: microchip: sparx5: fix mdio reg | expand |
Hi Krzysztof, On Mon, 2024-04-01 at 17:37 +0200, Krzysztof Kozlowski wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > Since beginning the DTS extended the SPI0 in two places adding two SPI > muxes, each with same SPI NOR flash. Both used exactly the same > chip-selects, so this was clearly buggy code. Without checking in > datasheet, assume device has only one SPI NOR flash, so code was > duplicated. > > Fixes dtc W=1 warnings: > > sparx5_pcb134_board.dtsi:277.10-281.4: Warning (unique_unit_address_if_enabled): > /axi@600000000/spi@600104000/flash@0: duplicate unit-address (also used in node > /axi@600000000/spi@600104000/spi@0) > > Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> > > --- > > Not tested on hardware > --- > .../boot/dts/microchip/sparx5_pcb134_board.dtsi | 16 ---------------- > 1 file changed, 16 deletions(-) > > diff --git a/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi > b/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi > index f165a409bc1d..dc7b59dfcb40 100644 > --- a/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi > +++ b/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi > @@ -281,22 +281,6 @@ flash@0 { > }; > }; > > -&spi0 { > - status = "okay"; > - spi@0 { > - compatible = "spi-mux"; > - mux-controls = <&mux>; > - #address-cells = <1>; > - #size-cells = <0>; > - reg = <0>; /* CS0 */ > - flash@9 { > - compatible = "jedec,spi-nor"; > - spi-max-frequency = <8000000>; > - reg = <0x9>; /* SPI */ > - }; > - }; > -}; > - When testing this on actual HW the SPI NOR is no longer accessible. The reason is that it sits behind a SPI-MUX and that needs to be present in the Device Tree. So if you do the "reverse" clean-up it works fine: Remove the simple spi0 node and keep the one that has the spi-mux reference. > &sgpio0 { > status = "okay"; > microchip,sgpio-port-ranges = <8 15>; > -- > 2.34.1 > Thanks for the cleanup of the DT files! Best Regards Steen
On 05/04/2024 14:10, Steen Hegelund wrote: > Hi Krzysztof, > > On Mon, 2024-04-01 at 17:37 +0200, Krzysztof Kozlowski wrote: >> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe >> >> Since beginning the DTS extended the SPI0 in two places adding two SPI >> muxes, each with same SPI NOR flash. Both used exactly the same >> chip-selects, so this was clearly buggy code. Without checking in >> datasheet, assume device has only one SPI NOR flash, so code was >> duplicated. >> >> Fixes dtc W=1 warnings: >> >> sparx5_pcb134_board.dtsi:277.10-281.4: Warning (unique_unit_address_if_enabled): >> /axi@600000000/spi@600104000/flash@0: duplicate unit-address (also used in node >> /axi@600000000/spi@600104000/spi@0) >> >> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> >> >> --- >> >> Not tested on hardware >> --- >> .../boot/dts/microchip/sparx5_pcb134_board.dtsi | 16 ---------------- >> 1 file changed, 16 deletions(-) >> >> diff --git a/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi >> b/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi >> index f165a409bc1d..dc7b59dfcb40 100644 >> --- a/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi >> +++ b/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi >> @@ -281,22 +281,6 @@ flash@0 { >> }; >> }; >> >> -&spi0 { >> - status = "okay"; >> - spi@0 { >> - compatible = "spi-mux"; >> - mux-controls = <&mux>; >> - #address-cells = <1>; >> - #size-cells = <0>; >> - reg = <0>; /* CS0 */ >> - flash@9 { >> - compatible = "jedec,spi-nor"; >> - spi-max-frequency = <8000000>; >> - reg = <0x9>; /* SPI */ >> - }; >> - }; >> -}; >> - > > When testing this on actual HW the SPI NOR is no longer accessible. > The reason is that it sits behind a SPI-MUX and that needs to be present in the Device Tree. > > So if you do the "reverse" clean-up it works fine: Remove the simple spi0 node and keep the one that > has the spi-mux reference. Aaaa, so we need to do it that way. Thanks for testing! I'll send v2. Best regards, Krzysztof
diff --git a/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi b/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi index f165a409bc1d..dc7b59dfcb40 100644 --- a/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi +++ b/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi @@ -281,22 +281,6 @@ flash@0 { }; }; -&spi0 { - status = "okay"; - spi@0 { - compatible = "spi-mux"; - mux-controls = <&mux>; - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; /* CS0 */ - flash@9 { - compatible = "jedec,spi-nor"; - spi-max-frequency = <8000000>; - reg = <0x9>; /* SPI */ - }; - }; -}; - &sgpio0 { status = "okay"; microchip,sgpio-port-ranges = <8 15>;
Since beginning the DTS extended the SPI0 in two places adding two SPI muxes, each with same SPI NOR flash. Both used exactly the same chip-selects, so this was clearly buggy code. Without checking in datasheet, assume device has only one SPI NOR flash, so code was duplicated. Fixes dtc W=1 warnings: sparx5_pcb134_board.dtsi:277.10-281.4: Warning (unique_unit_address_if_enabled): /axi@600000000/spi@600104000/flash@0: duplicate unit-address (also used in node /axi@600000000/spi@600104000/spi@0) Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> --- Not tested on hardware --- .../boot/dts/microchip/sparx5_pcb134_board.dtsi | 16 ---------------- 1 file changed, 16 deletions(-)