| Message ID | 20210519143700.27392-8-bhupesh.sharma@linaro.org (mailing list archive) |
|---|---|
| State | Accepted |
| Headers | show |
| Series | Enable Qualcomm Crypto Engine on sm8250 | expand |
On 5/19/21 10:36 AM, Bhupesh Sharma wrote: > In commit 3e482859f1ef ("dts: qcom: sdm845: Add dt entries > to support crypto engine."), we decided to use the value indicated > by constant RPMH_CE_CLK rather than using it directly. > > Now that the same RPMH clock value might be used for other > SoCs (in addition to sdm845), let's use the constant > RPMH_CE_CLK to make sure that this dtsi is compatible with the > other qcom ones. > > Cc: Thara Gopinath <thara.gopinath@linaro.org> > Cc: Bjorn Andersson <bjorn.andersson@linaro.org> > Cc: Rob Herring <robh+dt@kernel.org> > Cc: Andy Gross <agross@kernel.org> > Cc: Herbert Xu <herbert@gondor.apana.org.au> > Cc: David S. Miller <davem@davemloft.net> > Cc: Stephen Boyd <sboyd@kernel.org> > Cc: Michael Turquette <mturquette@baylibre.com> > Cc: Vinod Koul <vkoul@kernel.org> > Cc: dmaengine@vger.kernel.org > Cc: linux-clk@vger.kernel.org > Cc: linux-crypto@vger.kernel.org > Cc: devicetree@vger.kernel.org > Cc: linux-kernel@vger.kernel.org > Cc: bhupesh.linux@gmail.com > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Reviewed-by: Thara Gopinath <thara.gopinath@linaro.org> Warm Regards Thara > --- > arch/arm64/boot/dts/qcom/sdm845.dtsi | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi > index 0a86fe71a66d..2ec4be930fd6 100644 > --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi > +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi > @@ -2316,7 +2316,7 @@ cryptobam: dma@1dc4000 { > compatible = "qcom,bam-v1.7.0"; > reg = <0 0x01dc4000 0 0x24000>; > interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&rpmhcc 15>; > + clocks = <&rpmhcc RPMH_CE_CLK>; > clock-names = "bam_clk"; > #dma-cells = <1>; > qcom,ee = <0>; > @@ -2332,7 +2332,7 @@ crypto: crypto@1dfa000 { > reg = <0 0x01dfa000 0 0x6000>; > clocks = <&gcc GCC_CE1_AHB_CLK>, > <&gcc GCC_CE1_AHB_CLK>, > - <&rpmhcc 15>; > + <&rpmhcc RPMH_CE_CLK>; > clock-names = "iface", "bus", "core"; > dmas = <&cryptobam 6>, <&cryptobam 7>; > dma-names = "rx", "tx"; >
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 0a86fe71a66d..2ec4be930fd6 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -2316,7 +2316,7 @@ cryptobam: dma@1dc4000 { compatible = "qcom,bam-v1.7.0"; reg = <0 0x01dc4000 0 0x24000>; interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rpmhcc 15>; + clocks = <&rpmhcc RPMH_CE_CLK>; clock-names = "bam_clk"; #dma-cells = <1>; qcom,ee = <0>; @@ -2332,7 +2332,7 @@ crypto: crypto@1dfa000 { reg = <0 0x01dfa000 0 0x6000>; clocks = <&gcc GCC_CE1_AHB_CLK>, <&gcc GCC_CE1_AHB_CLK>, - <&rpmhcc 15>; + <&rpmhcc RPMH_CE_CLK>; clock-names = "iface", "bus", "core"; dmas = <&cryptobam 6>, <&cryptobam 7>; dma-names = "rx", "tx";
In commit 3e482859f1ef ("dts: qcom: sdm845: Add dt entries to support crypto engine."), we decided to use the value indicated by constant RPMH_CE_CLK rather than using it directly. Now that the same RPMH clock value might be used for other SoCs (in addition to sdm845), let's use the constant RPMH_CE_CLK to make sure that this dtsi is compatible with the other qcom ones. Cc: Thara Gopinath <thara.gopinath@linaro.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Andy Gross <agross@kernel.org> Cc: Herbert Xu <herbert@gondor.apana.org.au> Cc: David S. Miller <davem@davemloft.net> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Vinod Koul <vkoul@kernel.org> Cc: dmaengine@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: linux-crypto@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: bhupesh.linux@gmail.com Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)